1. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Latches & Flip-Flops

2. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Changes in input values are reflected immediately (subject to the speed of light and electrical delays) on the outputs Each gate has an associated “electrical delay” Delays are often ignored for the purpose of the logic design (but not for the real implementation!) As soon as inputs change, the outputs change – no memory of what happened before –(at least conceptually) Combinational Logic (Review)

3. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Example Needing Bit Storage Flight attendant call button –Press call: light turns on Stays on after button released –Press cancel: light turns off –Logic gate circuit to implement this? Q Call Cancel Doesn’t work. Q=1 when Call=1, but doesn’t stay 1 when Call returns to 0 Need some form of “feedback” in the circuit Bit Storage Blue light Call button Cancel button Bit Storage Blue light Call button Cancel button Bit Storage Blue light Call button Cancel button

4. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Simple Memory Element –Must provide a feedback loop to allow memory of current state –How do you control the memory – load it, change it, clear it?? Take CS 278 (or check out the Appendix) AB

5. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Master-Slave D Flip-Flop A state element that is edge-sensitive –Want changes in output ONLY on the transition of the Clk signal from 0  1 (or from 1  0) D Q Q positive edge-triggered flip-flop

6. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Timing of Master-Slave D Flip-Flop Changes to Q occur only on the positive edge of the Clock D Clock Q D Q Q positive edge-triggered flip-flop time 

7. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Registers –A flip-flop stores one bit of information –When you want to store n bits  register n flip-flops used Clock is shared by all so action is synchronous with clock edge –Some common register types Simple register Shift register Parallel access shift register Lots of counters: up counter, down counter, BCD counter, ring counter, Johnson counter

8. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Simple 4 Bit Register –A standard 4 bit register using D flip flops Q 3 Q 2 Q 1 Q 0 Clock Parallel input Parallel output D Q Q D Q Q D Q Q D Q Q

9. CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst 4 Bit Register with Load Control –Controlling the load capability Q 3 Q 2 Q 1 Q 0 Clock Parallel input Parallel output D Q Q D Q Q D Q Q D Q Q Load