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Computer Architecture and Organization
Instruction Sets: Characteristics and Functions
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The complete collection of instructions that are a CPU can perform
Instruction set The complete collection of instructions that are a CPU can perform A program is a “machine code” of consecutive machine instructions Represented in binary form Usually described by assembly codes 2
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Elements of an Instruction
Operation code (Op code) Do this Source Operand reference To this Result Operand reference Put the answer here Next Instruction Reference When you have done that, do this... Implicit in case of sequential execution (PC stores it) 3
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Operand source and destination
Main memory Virtual memory Cache CPU register I/O device 4
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Instruction Representation
In machine code each instruction has a unique bit pattern For human user (programmer) a symbolic representation is used e.g. ADD, SUB, LOAD Operands can also be represented in this way ADD R, A Means add the contents of memory location A to Register R And store the result back in Register R Note: operation performed on the contents of A (not on the address itself) 5
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Simple Instruction Format
Characteristics: 2 operand instruction Could be 0, 1, 2, 3 or more … 4 bit opcode Instruction set can have at most 16 instructions 6 bit operands limit on memory + number representation)
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Instruction Cycle State Diagram
Note: it is NOT guaranteed that a fetched instruction is executed! There are traps/exceptions
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Example of Program Execution
Fetch Execute
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Instruction Types Data processing Data storage Data movement
Arithmetic and logic instruction Data storage Memory instructions: Load from memory, Store to memory Data movement I/O operations Read from I/O device, write to I/O device Program flow control Test instructions (used e.g. in conditionals) Branch instructions (used in conditionals, loops) 6
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Number of Addresses 3 addresses Operand 1, Operand 2, Result
ADD A, B, C A B + C May be a forth - next instruction (usually implicit) Not common Needs very long words to hold everything 7
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Number of Addresses 2 addresses
One address doubles as operand and result ADD A, B A A + B Reduces length of instruction Requires some extra work Temporary storage to hold some results 8
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Number of Addresses 1 address Implicit second address
Usually a register (accumulator) ADD A AC AC + A Common on early machines 9
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Number of Addresses 0 (zero) address All addresses implicit
Uses a stack Compute C = A + B PUSH A PUSH B ADD POP C 10
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Number of Addresses Summary
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How Many Addresses More addresses Fewer addresses
More complex (powerful?) instructions More registers Inter-register operations are quicker Fewer instructions per program Fewer addresses Less complex (less powerful) instructions More instructions per program Faster fetch/execution of instructions 11
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Design Decisions Operation repertoire Data types Instruction formats
How many ops? What can they do? How complex are they? Data types Instruction formats Length of op code field Number of addresses 12
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Addressing modes (later…) RISC v CISC
Design Decisions Registers Number of CPU registers available Which operations can be performed on which registers? Addressing modes (later…) RISC v CISC 13
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Types of Operand Addresses Numbers Characters Logical Data
Fixed point = Integer Floating point Characters Encoded IRA (in USA known as ASCII), EDCDIC Logical Data Bits or flags 14
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Addressing is by 8 bit unit
Pentium Data Types 8 bit byte 16 bit word 32 bit double word 64 bit quad word Addressing is by 8 bit unit A 32 bit double word is read at addresses divisible by 4 15
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General - arbitrary binary contents Integer - single binary value
Specific Data Types General - arbitrary binary contents Integer - single binary value Ordinal - unsigned integer Unpacked BCD - One digit per byte Packed BCD - 2 BCD digits per byte Near Pointer - 32 bit offset within segment Bit field Byte String Floating Point 16
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Pentium Numeric Data Formats
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Some instructions need operand aligned on 32 bit boundary
PowerPC Data Types 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) length data types Some instructions need operand aligned on 32 bit boundary Can be big- or little-endian Fixed point processor recognises: Unsigned byte, unsigned halfword, signed halfword, unsigned word, signed word, unsigned doubleword, byte string (<128 bytes) Floating point IEEE 754 Single or double precision
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Types of Operation Data Transfer Arithmetic Logical Conversion I/O
System Control Transfer of Control 18
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May be different instructions for different movements
Data Transfer Specify Source Destination Amount of data May be different instructions for different movements e.g. IBM 370 Or one instruction and different addresses e.g. VAX 19
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Add, Subtract, Multiply, Divide Signed Integer Floating point ?
Arithmetic Add, Subtract, Multiply, Divide Signed Integer Floating point ? May include Increment (a++) Decrement (a--) Negate (-a) 20
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Shift and Rotate Operations
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Logical Bitwise operations AND, OR, NOT 21
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Conversion E.g. Binary to Decimal 22
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May be specific instructions
Input/Output May be specific instructions May be done using data movement instructions (memory mapped) May be done by a separate controller (DMA) 23
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Privileged instructions CPU needs to be in specific state
Systems Control Privileged instructions CPU needs to be in specific state Ring 0 on Kernel mode For operating systems use 24
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Transfer of Control Branch Skip Subroutine call
e.g. branch to x if result is zero Skip e.g. increment and skip if zero ISZ Register1 Branch xxxx ADD A Subroutine call E.g. interrupt call 25
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x86 Branch instructions Compare: cmp sets flags
Conditional jump: jne = jump on not equal, checks flags. Conditional jumps: there is a lot of them. Some examples: jpo = jump if parity odd jpe = jump if parity even jo = jump if overflow jno = jump if no overflow jz = jump if zero jnz = jump if not zero je = jump if equal jl = jump if less than jle = jump if less than or equal jg = jump if greater than jge = jump if greater than or equal
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Branch Instruction
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Nested Procedure Calls
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Use of Stack
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Stack Frame Growth Using Sample Procedures P and Q
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What order do we read numbers that occupy more than one byte
Byte Order What order do we read numbers that occupy more than one byte e.g. (numbers in hex to make it easy to read) can be stored in 4 x 8 bit locations as follows 27
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Address Version 1 Version 2 0x00184 12 78 0x00185 34 56 0x00186 56 34
Byte Order (example) Address Version 1 Version 2 0x 0x 0x 0x i.e. read top down or bottom up? 28
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The problem is called Endian
Byte Order Names The problem is called Endian The system on the right has the least significant byte in the lowest address This is called little-endian The system on the left has the least significant byte in the highest address This is called big-endian 29
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Example of C Data Structure
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Alternative View of Memory Map
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Endianess is not standardized
Pentium (80x86), VAX are little-endian IBM 370, Motorola 680x0 (Mac), and most RISC are big-endian Internet is big-endian Makes writing Internet programs on PC more awkward! WinSock provides htoi and itoh (Host to Internet & Internet to Host) functions to convert 30
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