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Rapid ARM-based JPEG Processor report of HW/SW Co-Design
Professor: 陳少傑 Students: R 林耿賢 R 李源華 P 陳宗裕
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Outline Block of ARM-based JPEG Processor JPEG Software Demo
Benchmark of JPEG Software Why use hardware 2D DCT? Algorithm of Row-Column decomposition 2D DCT. Matlab Demo of this Algorithm Comparison Reference
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Rapid ARM-based JPEG Processor
Integrate which we learn in the HW/SW Co-Design and ARM Lab. Embedded System/ Real Time Operation System. ARM 32-bits processor/ AMBA Bus. JPEG Algorithm.
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Block Diagram 1 AHB CMOS Sensor Wrapper ARM Core ARM7TDMI On-Chip RAM
DMA Master Bridge AHB UART Timer PIO Keypad APB Memory Interface A typical AMBA system AHB CMOS Sensor Wrapper
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Run(uC/OSII, JPEG Encoder..)
Block Diagram 2 ARM7TDMI Run(uC/OSII, JPEG Encoder..) DRAM ARM semi-Hoster AHB AHB CMOS Sensor Wrapper
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CMOS Image Sensor i-Magic Technologies IM88023A
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JPEG Algorithm DCT BMP File Huffman Encoding JPEG File Down Sampling
Color Transform RGB to YUV Down Sampling Quantization DCT BMP File Huffman Encoding JPEG File
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JPEG Encoder in Mobile Phone
Task 2: Communication Task Task 1: Read a frame from COMS Sensor and JPEG Encoder
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JPEG ARM Software Demo
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JPEG Software Demo 1 ARM JPEG Encoder Peppers.bmp Peppers.jpg
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JPEG Software Demo 2 ARM JPEG Encoder Mandrill.bmp Mandrill.jpg
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Benchmark of the ARM JPEG Software
DCT Quant. VLC Cycles 5000 3000
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Block of 2D DCT in ARM-based JPEG Processor
ARM7TDMI Run(uC/OSII, JPEG Encoder ..) DRAM ARM semi-Hoster AHB AHB CMOS Sensor Wrapper 2D DCT
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Product of DSC 1 SunPlus – GT8980
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Product DSC 2 TMS320DSC25
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Algorithm of 2D DCT
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The original 1D DCT
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Row-Column decomposition (RCD) method
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Matlab Demo of 2D DCT Our Algorithm
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Algorithm of 1D DCT 1
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Algorithm of 1D DCT 2 Where
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Algorithm of 1D DCT 3
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Algorithm of 1D DCT 4
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Algorithm of 1D DCT 5
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Algorithm of 1D DCT 6
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Architecture Design for Proposed Transposition Memory 1
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Architecture Design for Proposed Transposition Memory 2
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Comparison 1D DCT Compare with software
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