1. 1 ENGG 1015 Tutorial Digital Logic (II) (70 pages) 15 Oct Learning Objectives  Learn about Boolean Algebra (SoP/PoS, DrMorgan's Theorem, simplification), Karnaugh map, Full adder, Flip Flop, Counter, Finite State Machine… News  Safety in Lab Ack.: HKU ELEC1008, ISU CprE 281x, PSU CMPEN270, Wikimedia Commons

2. Electrical Safety 5-10 ma can cause death Skin resistance can range from 1kΩ for wet skin to 500kΩ for dry skin. Death can result from as low as 50 volts Body can sense 9 volts under the right conditions NO Slippers, NO Sandals in Lab Report to TA or technician for any emergency case

3. 3 Boolean Algebra De Morgan's theorem  Ways for simplification A + B = B + AAB = BA A + (B + C) = (A + B) + CA (BC) = (AB) C A + BC = (A + B) (A + C)A (B+C) = AB + AC A + AB = AA (A + B) = A

4. 4 Digital Logic Equivalent logic using De Morgan's theorem  AND NOT  NOT OR  OR NOT  NOT AND  NOT AND  OR NOT  NOT OR  AND NOT

5. 5 Quick Checking

6. 6 Any logic function may be implemented by using only OR and NOT gates or only AND and NOT gates

7. 7 Questions for Boolean Algebra

8. 8 Solutions

9. 9 Boolean Algebra Simplification Sum of Products  How to make “1”?  Better if less “1” Products of Sum  How to make “0”?  Better if less “0”

10. 10 Boolean Algebra Using SOP and POS Find out the expression

11. 11 Boolean Algebra Using SOP and POS What about the alternative expression?

12. 12 Question 1: Boolean Algebra (SoP/PoS) Find an expression for F and

13. 13 Sum of Products for F Product of Sums for F Solution 1

14. 14 Sum of Products for Product of Sums for Solution 1

15. 15 Question 2: Boolean Algebra ( DeMorgan's Theorem) Use DeMorgan's Theorem to simplify the following expressions

16. 16 Solution 2

17. 17 Question 3: Circuit representation of logic equations Show how can be implemented with one two-input NOR and one two-input NAND gate.

18. 18 Solution 3 Show how can be implemented with one two-input NOR and one two-input NAND gate. (How to convert ?)  We need to apply De Morgan’s Theorem

19. a) Simplify the circuit shown in the figure using Boolean algebra. b) Change each NAND gate in the circuit of the figure to a NOR gate, and simplify the circuit using Boolean algebra. 19 Question 4: Circuit representation of digital logic

20. 20 Solution 4a Procedure: 1) Obtain the Boolean expression from the circuit 2) Check if we need NAND/NOR gate 3) Simplify the expression by Boolean algebra and adding double inversion

21. 21 Solution 4b First, we convert the circuit

22. 22 Solution 4b Then, we simplify the Boolean expression (Group, Group) (Expand) (Simplify) (DeMorgan's Theorem)

23. 23 Solution 4b (Simplify) (Expand) (Group, Group) (Simplify)

24. 24 Question 5: Circuit representation of digital logic Construct the given circuit using NAND gates only  Top down approach: ?  Bottom up approach: ?

25. 25 Solution 5a Top down: Expanding the Boolean expression By DeMorgan’s Theorems,

26. 26 Bottom-up: Construct NOT gate, AND gate and OR gate from NAND gate Solution 5b i) ii) iii)

27. 27 Solution 5b Top-down and Bottom-up: Same number of gate, same configuration, different approach (cancelled)

28. 28 Question 6: Conversion of three representations Describe the function using Boolean expressions Draw the truth table and describe the function using sum of product

29. 29 Solution 6 POS: (De Morgan) (grouping, expansion) (XOR expansion) (expansion) (cancellation) Approach 1: Boolean simplification  Find TT Approach 2: Construct TT  Find POS

30. 30 Quick Checking Construct NOT gate, AND gate and OR gate from NAND gate i) ii) iii)

31. 31 Karnaugh map Draw the table; Fill in 0s and 1s; Grouping Group one/two/four/eight/ sixteen ‘1’(s) only Use the least number of groups to group all numbers To group as many numbers as possible in a group

32. Examples of Karnaugh maps 32

33. 33 Question 7: Simplification using K-map Simplify the following Boolean expressions using Karnaugh map.

34. 34 Solution 7 A/B01 000 111 A/BC00011110 00011 11111 i) ii)

35. 35 Question 8: Logic Simplification Simplify the Boolean expression of the circuit Change each NAND gate in the circuit to a NOR gate, and simplify the Boolean expression of the circuit

36. 36 Solution 8a (Expand) (Group) Solve by expression simplification

37. 37 MNQx 0000 0010 0100 0111 1000 1011 1100 1111 01101 01000 10110100 NQ M Solution 8a From truth table to K-map Solve by K-map

38. 38 Solution 8b Solve by expression simplification

39. 39 Solution 8b

40. 40 MNQx 0000 0011 0100 0111 1000 1011 1101 1111 11101 01100 10110100 NQ M Solution 8b Solve by K-map

41. 41 Arithmetic Circuit Half Adder CS=A+B single bit  C: Carry S: Sum Full Adder C o S=A+B+C i single bit  e.g. Parallel Adder

42. 42 Question 9: Full Adder Design Construct the Boolean expression of a FA Verify it by constructing a truth table

43. 43 Solution 9 (Find out expression of S 1 and C 2 )

44. 44 Solution 9 Any alternative approach?

45. 45 Solution 9 Half AdderCS=A+B ABCS 0000 0101 1001 1110

46. 46 Solution 9 Full Adder C o S=A+B+C i ABCiCi CoCo S 00000 00101 01001 01110 10001 10110 11010 11111 Find out expression using SOP

47. 47 Quick Checking What is the simplest logic expression? 11101 01100 10110100 NQ M

48. Question 10: Flip Flop (FF) How many FFs are required to build a binary counter that counts from 0 to 1023?  From “0” to “1023”  Range = 1024  Number of FF required = 10 (since 2 10 =1024) Determine the frequency at the output of the last FF of this counter for an input clock frequency of 2MHz.  1,2,…,1024,1,2,…,1024,…,1,2,…,1024  How many times?  With 10 FFs, the range is 1024, therefore, the frequency division at the last FF will be 1/1024 relative to the input check. Thus, output frequency = 2MHz/1024 = 1953 Hz 48

49. Question 10 If the counter is initially at zero, what count will it hold after 2060 pulses?  Every 1024 pulses the counter recycles through zero. Thus, after 2048 pulses the counter is back at count zero. Therefore, after 2060 pulses the counter will be at count 12 (i.e. 2060 = 1024 + 1024 + 12) 1,2,…,1024,1,2,…,1024,1,2,…,11,12  2060 pulses 49

50. Question 11: Counter Figure a) shows a complete four-bit parallel adder with registers and b) shows the signals used to add binary numbers from memory and store their sum in the accumulator. Suppose the numbers being added are 1001 and 0101. Also assume that C o =0. Describe what happen at t 1, t 2, t 3, t 4 and t 5. 50

51. Solution 11 51

52. 52

53. 53

54. 54

55. Finite State Machine (FSM) Circuit components  Flip Flops (FFs); Clock; Logic gates; Input; Output State  Present state: before clock  Next state: after clock  State transition: during clock  n FFs  2 n states 55

56. A more complicated FSM conversion example 56 FSM / Truth table / Circuit Logic for output Logic for state transition Store the state

57. Steps in designing a state machine Start writing a state transition diagram  An initial state  Other states to keep track of various activities  Transitions Generate a state transition table and a output table  Write state transition table and output table in binary State assignment, i.e., the code used for each state Derive canonical sum-of-product expressions Draw the circuit 57

58. From FSM to truth table Four states  2 x 1b register for q/q* (q: present) (q*: next) 58

59. From FSM/Truth Table to circuit 59 clk FFs; Clock; Logic gates; Input; Output

60. Question 12: A simple FSM design Design a state machine that will repeatedly display in binary values 1, 3, 5, and 7  How many states we need?  S0, S1, S2, S3  Simplified state transition diagram? 60

61. Solution 12 Output table L2 = XY'+XY = X L1 = X'Y+XY = Y L0 = X'Y'+X'Y+XY'+XY = 1 State transition table X = X'Y+XY' Y = X'Y+XY' = Y' 61 Current stateOutput S0 (00)1 (001) S1 (01)3 (011) S2 (10)5 (101) S3 (11)7 (111) CurrentOutput XYL2L1L0 00001 01011 10101 11111 Current stateNext state S0 (00)S1 (01) S2 (10) S3 (11) S0 (00) CurrentNext XYXY 0001 0110 1011 1100

62. Question 13: A typical FSM design Design a 2-bit counter with input x that can be  A down counter when x = 0 (…  11  10  01  00  11  …)  A Johnson counter when x = 1 (…  00  01  11  10  00  …) 62 From FSM to Truth table

63. From truth table to circuit Solution 13 63

64. Question 14: A practical FSM design Vending Machine  Collect money, deliver product and change Vending machine may get three inputs, n, d, q  Inputs are nickel (5c), dime (10c), and quarter (25c)  Only one coin input at a time  Product cost is 40c  Does not accept more than 50c (blocks the coin slot)  Returns 5c or 10c back  Exact change appreciated 64

65. Solution 14 We are designing a Mealy state machine (i.e., output depends on both current state and inputs). Suppose we ask the machine to directly return the coin if it cannot accept an input coin. Inputs: I 1 I 2  Represent the coin inserted  00 - no coin (0 cent), 01 – nickel (5 cents), 10 – dime (10 cents), 11 – quarter (25 cents) Outputs: C 1 C 2 P  C 1 C 2 represent the coin returned  P indicates whether to deliver product 65

66. Solution 14 States: S 1 S 2 S 3  Represent the money inside the machine now  3 bits are enough to encode the states  Notice the names (they need not be S0, S1….)  S00 – 000, S05 – 001, S10 – 010, S15 – 011, S20 – 100, S25 – 101, S30 – 110, S35 – 111 66

67. Solution 14 67

68. Solution 14 68 S35 11/110 – S35 10/011 – S00 01/001 – S00 11/110 11/000 01/000 10/000 S35: Currently the machine has 35 cents S35: Four possible inputs and three possible outputs e.g. 11/110 : If we insert a quarter (11), then the machine should return one quarter and zero product (110)  35c (35 cents inside the machine now) + 25c (insert 25 cents) = 35c (35 cents inside the machine in the next state) + 25c (return 25 cents) + 0c (return no product) Input Output Next state

69. Solution 14 69 S35 11/110 – S35 10/011 – S00 01/001 – S00 11/110 11/000 01/000 10/000 e.g. 10/011: If we insert a dime (11), then the machine should return one nickel and one product (011)  35c (35 cents inside the machine now) + 10c (insert 10 cents) = 0c (zero cent inside the machine in the next state) + 5c (return 5 cents) + 40c (return one product) e.g. 01/110: If we insert a nickel (01), then the machine should return zero coin and one product (001)  35c (35 cents inside the machine now) + 5c (insert 5 cents) = 0c (zero cent inside the machine in the next state) + 0c (return zero cent) + 40c (return one product)

70. Electrical Safety 5-10 ma can cause death Skin resistance can range from 1kΩ for wet skin to 500kΩ for dry skin. Death can result from as low as 50 volts Body can sense 9 volts under the right conditions NO Slippers, NO Sandals in Lab Report to TA or technician for any emergency case 70