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By Squadron Leader Zahid Mir CS&IT Department, Superior University PHY-BE -22 JFET Characteristics & Parameters.

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Presentation on theme: "By Squadron Leader Zahid Mir CS&IT Department, Superior University PHY-BE -22 JFET Characteristics & Parameters."— Presentation transcript:

1 By Squadron Leader Zahid Mir CS&IT Department, Superior University PHY-BE -22 JFET Characteristics & Parameters

2 Consider that gate-to-source voltage is zero (V GS = 0V). As V DD (thus V DS ) is increased from 0V, I D will increase proportionally, as shown in the graph between point A and B. In this area, the channel resistance is essentially constant because depletion region is not large enough to have significant effect. This is called the ohmic area because V DS and I D are related by Ohm’s law. At point B, the curve levels off and I D becomes essentially constant. As V DS increases from point B to C, the reverse-bias voltage from gate to drain (V GD ) produces a depletion region large enough to offset the increase in V DS, thus keeping I D relatively constant.

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4 Pinch-Off Voltage For V GS = 0V, the value of V DS at which I D becomes constant is called the pinch-off voltage, V P. A continued increase in V DS above the pinch-off voltage produces an almost constant drain current. This value of drain current is I DSS (Drain to Source current with gate Shortened). I DSS is the maximum drain current that a specific JFET can produce regardless of the external circuit, and is always specified for the condition, V GS = 0V.

5 Now we connect a bias voltage, V GG, from gate to source. As V GS is set to increasingly more negative values b adjusting V GG, a family of characteristic curves is produced. Note that I D decreases as the magnitude of V GS is increased to larger negative values because of the narrowing of the channel. For each increase in V GS, the JFET reaches pinch-off at values of V DS less than V P. Hence the drain current is controlled by V GS.

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7 Cutoff Voltage The value of V GS that makes I D approximately zero is the cutoff voltage, V GS(off). The JFET must be operated between V GS =0V and V GS(off). For this range of gate-to- source voltages, I D will vary from a maximum of I DSS to a minimum of almost zero.


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