2. 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today: First Hour: Computer Organization –Section 11.1 of Katz’s Textbook –In-class Activity #1 Second Hour: Test Review

3. 2 Register Data In (N bits) Load Data Out (N bits) Output Enable N N (we have Tri-state outputs) Basic Building Blocks (1)

4. 3 Basic Building Blocks (2) Shift Register Data In Load Data Out Output Enable N N Shift Controls (left/right/no shift) Shift Register

5. 4 Basic Building Blocks (3) Combinational Shifter Shifter N N Shift Control Signals Edge Inputs Edge Outputs

6. 5 Basic Building Blocks (4) Arithmetic-Logic Unit N N A B ALU Operation N Flags (carry out, overflow, etc.) Result Keep in mind: The ALU is a combinational circuit. Keep in mind: The ALU is a combinational circuit.

7. 6 Buses Data Lines (two-way) N Address Lines (one-way) M Control Lines (mix of 1 and 2-way lines) C A shared collection of wires for exchanging data, with some defined rules Rule 1: Only one device can write to a bus at any time Rule 2: Multiple devices can read the bus at any time Rule 3: There is usually a bus protocol that is followed strictly by all devices sharing the bus Rule 1: Only one device can write to a bus at any time Rule 2: Multiple devices can read the bus at any time Rule 3: There is usually a bus protocol that is followed strictly by all devices sharing the bus

8. 7 3 Registers Sharing a Bus N M C Register 1Register 2Register 3 OE1 OE2 OE3 LOAD1LOAD2LOAD3 Only one of these OE’s can be true at once Several of these can be true at once OE’s and LOAD’s generally determined by the control lines

9. 8 Register-to-Register Data Transfer N OE1 M C Register 1Register 2Register 3 OE2 OE3 LOAD1LOAD2 LOAD3 Register 1  Register 3

10. 9 RAM Random Access Memory M A R Address Register (we provide address here) M B R Memory Buffer Register (we exchange data here) Request (Chip Select) Read/Write Wait Memory Control Signals Memory Control Signals Slow RAMs usually ask Processor to wait

11. 10 Note: This is not the only way to build a computer, but is the most common one. Note: This is not the only way to build a computer, but is the most common one. I want to build a computer! Basic Idea #1: The Stored Program Computer Concept This is an instruction-controlled digital system with a memory A sequence of instructions are stored in memory This set of instructions constitute the program that defines the machine’s behavior The same memory also holds the data needed to execute the program The same memory also holds the outputs produced by the program, as well as any intermediate results The memory is large (ideally, infinite)

12. 11 The processor executes the following “infinite loop” forever: Step 1. Fetch the next instruction from memory to a register The register is usually called the instruction register The address of the next instruction is usually stored in a register called the program counter. Step 2. Decode the instruction Step 3. Fetch any operands needed Step 4. Execute the instruction Step 5. Do internal housekeeping, and Go to Step 1 One important chore is to change the address in the program counter to point to the next instruction. The Cycle of Life Basic Idea #2: The Instruction Cycle

13. 12 Structure of a Computer Processor Memory System Control Datapath Address Read/Write Data Control Signals Data Inputs execution unit The Datapath Unit, also called the execution unit. It is analogous to the flesh and bones in the human body. Main parts: Registers, Shifter, ALU, Buses. instruction unit The Control Unit, also called the instruction unit. It is analogous to the brain and nervous system in the human body. Main parts: Finite-State Machine execution unit The Datapath Unit, also called the execution unit. It is analogous to the flesh and bones in the human body. Main parts: Registers, Shifter, ALU, Buses. instruction unit The Control Unit, also called the instruction unit. It is analogous to the brain and nervous system in the human body. Main parts: Finite-State Machine The Processor consists of two major parts: Central Processing Unit (CPU) Central Processing Unit (CPU) In its simplest form, a computer consists of a processor (CPU) and a memory system. In its simplest form, a computer consists of a processor (CPU) and a memory system.

14. 13 BUS The BUS is like a highway for transferring data from one point to any other point Program Counter (Holds address of NEXT instruction) Instruction Register (Holds the fetched instruction) Accumulator Involved in most instructions Note that this one has two outputs Put Them Together! Single Bus Design The Datapath Unit

15. 14 Do Activity #1 Now The Datapath Unit Random Access Memory M A R M B R Request (Chip Select) Read/Write Wait

16. 15 RETAIN THE LAST PAGE(S) (#3 onwards)!! For Next Class: Bring Randy Katz Textbook, & TTL Data Book Required Reading: – Sec 11.3, skim 11.2 of Katz, omit the ABEL and ASM descriptions This reading is necessary for getting points in the Studio Activity!