1. AEEC405 – Microprocessor Architecture

2. Some Information Instructor Details Main Book

3. Course Overview 1. Prerequisites: AEEE203, AEEE200, AEEE237 2. Introduction to microprocessors: microprocessor technologies Pin and signal descriptions loading and timing of the 80x86 microprocessors. Bus drivers, clock and reset circuits. 2. Memory interfacing, and synchronization: Interfacing with EPROMs, Static and Dynamic RAMs. Address decoding, memory maps and memory mirroring. Static and dynamic bus contention. Memory timing analysis, synchronization 3. Input/Output interfacing: Isolated and memory mapped I/O. LEDs, 7-segment displays, switches, keyboards relays and ac loads. I/O synchronization using interrupts and the polling technique. Interrupts. Use of programmable I/O devices. 3. Analog interfacing: Digital to analog and analog to digital converters 4. Laboratory Work: Individual or small group experiments performed with single board computers. Experiments include monitor commands, reset circuits, buffering, memory interfacing and I/O interfacing.

4. Course Assessment Assignment – 15% (approx. week 10) Mid-term exam – 15% (approx. week 6) Laboratory work – 10% Final – 60%

5. HISTORICAL PERSPECTIVE 1st generation: 1945 - 1955 – Tubes, punchcards 2nd generation: 1955 - 1965 – transistors 3rd generation: 1965 – 1980 – Integrated circuits 4th generation: 1980 – – PCs and workstations

6. 1st generation (1945-1955) Programming was done in machine language No operating system Programming and maintenance done by one group of people

7. ENIAC – The first electronic computer (1946) 18,000 tubes 300 Tn 170 KWatt

8. 2nd generation (1955-1965) Transistor-based Fairly reliable Clear distinction between designers, manufacturers, users, programmers, and support personnel. Only afforded by governments, universities or large companies (millions $)

9. 2nd generation (1955-1965) Program was first written on paper (FORTRAN) and then punched into cards Cards were then delivered to the user. Mostly used for scientific and technical calculations – Solving differential equations

10. 3rd generation (1965-1980) IC-based operation IBM develops compatible systems Tradeoffs in performance, memory, I/O etc). Greater MHz/$

11. 4th generation (1980-1990) LSI-based PCs Significantly cheaper User-friendly software 2 dominant operating systems: – MS DOS: IBM PC (8088, 80286, 80386, 80486) – UNIX: RISC workstations

12. 5th generation (1990-) PC networks Network operating systems Each machine runs its own operating system Users don ’ t care where their programs are being executed

13. Famous quotes “ Future computers may weigh less than 1,5 tn ”, (1949) “ I believe there is a world market for five computers ”, T. Watson, IBM CEO (1943) “ There is no particular reason why someone would want a computer at home ”, K. Oslon, president of DEC (1974) “ 640Κbytes of memory should be enough for anybody ”, B. Gates, president of Microsoft (1981)

20. Moore ’ s Law

21. Intel 4004 Micro-Processor

26. Computer architecture

27. Performance Measures CC: Clock cycle count CT: clock period f : clock frequency

28. Example Calculate the execution time for 6 Load/Store and 3 ALU instructions and the average MIPS for a machine running at 500 MHz:

29. RISC vs. CISC – Complex instruction set computer (CISC): Large instruction set; Complex operations; Complex addressing modes; Complex hardware, long execution time; Minimum number of instructions needed for a given task; Easy to program, simpler compiler. – Reduced instruction set computer (RISC): Small instruction set; Simple instructions to allow for fast execution (fewer steps); Large number of registers; Only read/write (load/store) instructions should access the main memory, one MM access per instruction; Simple addressing modes to allow for fast address computation; Fixed-length instructions with few formats and aligned fields to allow for fast instruction decoding; increased compiler complexity and compiling time; simpler and faster hardware implementation, pipelined architecture.

30. RISC vs. CISC example CISC (M68000) – Add the content of MM location pointed to by A3 to the component of an array starting at MM address 100. The index number of the component is in A2. The content of A3 is then automatically incremented by 1. RISC (MIPS)

31. Memory Architecture Von Neumann: Common memory for data and instructions Harvard: Separate data and instruction memories

32. Von Neumann Memory Architecture memory CPU PC address data IRADD r5,r1,r3 200 ADD r5,r1,r3

33. Harvard Memory Architecture CPU PC data memory program memory address data address data

34. Pipelining Dividing the processing task into stages, which are executed in parallel

35. Application-Specific Processors Processors optimized for a specific application domain – DSP processors Multiplier/accumulator in ALU, Harvard memory architecture – Multimedia processors Image processing/video hardware accelerators

36. Assembler/Compiler technologies Increased productivity by using high-level languages For critical tasks and embedded systems, assembly is commonly used

37. References Weste, Harris, CMOS VLSI Design: A Circuits and Systems Perspective Patterson, Hennessy - Computer Organization and Design; The Hardware-Software Interface, 2E (Morgan Kaufman, 1997) Fundamentals Of Computer Organization And Architecture (2005) Wiley