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CPS110: Address translation Landon Cox February 19, 2008
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Translator: just a data structure Tradeoffs Flexibility (sharing, growth, virtual memory) Size of translation data Speed of translation Dynamic address translation User process Translator (MMU) Translator (MMU) Physical memory Physical memory Virtual address Physical address
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1. Base and bounds For each process Single contiguous region of phys mem Not allowed to access outside of region Illusion own physical mem [0, bound)
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1. Base and bounds Virtual memoryPhysical memory 0 Bound Base Base + Bound 0 Size of phys mem
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1. Base and bounds Translator algorithm Only kernel can change base, bound if (virtual address > bound) { trap to kernel kernel can kill process with segmentation fault } else { physical address = virtual address + base }
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2. Segmentation Segment Region of contiguous memory (both virtually and physically) Idea Generalize base and bounds Create a table of base and bound pairs
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2. Segmentation Segment #BaseBound Segment 04000700 Segment 10500 Segment 2Unused Segment 320001000 Code Data segment Stack segment Virtual address has two parts 1.Segment # (could be in high-order bits) 2.Offset (e.g. low-order bits of address) Virtual info Physical info Same for both
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Virtual addresses VA={b 31,b 30,…,b 12,b 11,…,b 1,b 0 } Low-order bits (offset) High-order bits (segment number)
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2. Segmentation Segment #BaseBound Segment 04000700 Segment 10500 Segment 2Unused Segment 320001000 Code Data segment Stack segment Virtual memory (3,fff). (Stack) (3,000) … (1,4ff). (Data) (1,000) … (0,6ff). (Code) (0,0) Physical memory 46ff. (Code segment) 4000 … 2fff. (Stack segment) 2000 … 4ff. (Data segment) 0 Segment # Offset
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2. Segmentation Segment #BaseBound Segment 04000700 Segment 10500 Segment 2Unused Segment 320001000 Code Data segment Stack segment Not all virtual addresses are valid Nothing in segment 2 Nothing in segment 1 above 4ff Valid = part of process’s address space Accesses to invalid addresses are illegal Hence a “segmentation fault” Virtual memory (3,fff). (Stack) (3,000) … (1,4ff). (Data) (1,000) … (0,6ff). (Code) (0,0)
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2. Segmentation Segment #BaseBound Segment 04000700 Segment 10500 Segment 2Unused Segment 320001000 Code Data segment Stack segment Segments can grow (can move to new physical location) Protection Different protections for segments E.g. read-only or read-write B&B forced uniform protection Virtual memory (3,fff). (Stack) (3,000) … (1,4ff). (Data) (1,000) … (0,6ff). (Code) (0,0)
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2. Segmentation Segment #BaseBound Segment 04000700 Segment 10500 Segment 2Unused Segment 320001000 Code Data segment Stack segment What changes on a context switch? Contents of segment table Typically small (not many segments) Virtual memory (3,fff). (Stack) (3,000) … (1,4ff). (Data) (1,000) … (0,6ff). (Code) (0,0)
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Segmentation pros and cons Pros Multiple areas of address space can grow separately Easy to share parts of address space (can share code segment)
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Segmentation sharing Segment #BaseBound Segment 04000700 Segment 10500 Segment 2Unused Segment 320001000 Code Data segment Stack segment Segment #BaseBound Segment 04000700 Segment 14700500 Segment 2Unused Segment 330001000 Code Data segment Stack segment Virtual infoPhysical info
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Segmentation pros and cons Pros Multiple areas of address space can grow separately Easy to share parts of address space (can share code segment) Cons Complex memory allocation (still have external fragmentation)
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2. Segmentation Do we get virtual memory? (can an address space be larger than phys mem?) Segments must be smaller than physical memory Address space can contain multiple segments Can swap segments in and out What makes this tricky? Performance (segments are relatively large) Complexity (odd segment sizes packing problem) Solution: fixed-size segments called pages!
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Course administration Wednesday discussion section Moved to D344 (same time) Project 1 drawing to a close Median score: 67% (not so hot) Last semester at this time median was 98% One group with 100% (another is close) Some final tips …
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Course administration What to carefully reread Section 4.4 of the spec (ordering stuff) Thread implementation slides Lock implementation slides I see a lot of code that ignore these sources Other hints …
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Course administration /* * Allocate space for thread control block and * new stack. */ try { thread_ptr = new thread_t; thread_ptr->stack = NULL; thread_ptr->stack = new char [stack_size]; } catch(bad_alloc) { if (thread_ptr != NULL) { if (thread_ptr->stack != NULL) { delete [] thread_ptr->stack; } delete thread_ptr; } return(-1); }
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Course administration Project 2 (virtual memory) out next Thursday In some ways easier than P1 In some ways harder than P1 (not given a solution) Next deadline: midterm exam (February 26 th ) In-class One sheet (two sides) of notes No laptops or other electronic resources Practice exam in discussion section this week
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Midterm exam What will be covered? All threads/concurrency material Project 1 Lectures Homework problems
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Analysis vs synthesis No regurgitation questions Analysis questions Analyze system/program/design Trace through program Compute performance Determine properties (deadlock, starvation, races) Synthesis Design/construct a new system/program/design I like these more (e.g. learn the most doing projects)
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How to study Do homework problems Understand Project 1 In groups Create and answer questions I might ask (you might get lucky; happened in past)
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Syntax for programs Real or pseudo is fine (just be clear) STL is fine queue.{push, pop, front, empty} Monitors Project 1 syntax or OO syntax thread_lock (lock_num) or mutex.lock () Semaphores OO syntax sem1.up (), sem1.down (), sem2.up (), … There is no “getVal” call! Remember to specify initial value!!
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Syntax for traces Thread: line number (or range of lines) 1: checkMilk () { 2: if (noNote) { 3: leave note 4: if (noMilk){ 5: buy milk; 6: } 7: remove note; 8: } 9: } Landon: 1-2 Melissa: 1-2 Landon: 3-6 Melissa: 3-6
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On-board review
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3. Paging Very similar to segmentation Allocate memory in fixed-size chunks Chunks are called pages Why fixed-size pages? Allocation is greatly simplified Just keep a list of free physical pages Any physical page can store any virtual page
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3. Paging Virtual addresses Virtual page # (e.g. upper 20 bits) Offset within the page (e.g. low 12 bits) Each address refers to a byte of data For 12-bit offset, how big are pages? 4KB (2^12 different offsets)
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3. Paging Translation data is a page table Virtual page #Physical page # 010 115 220 3invalid …… 1048574Invalid 1048575invalid 2^20 – 1 Why? Why no bound column?
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3. Paging Translation data is a page table Virtual page #Physical page # 010 115 220 3invalid …… 1048574Invalid 1048575invalid How does page table’s size compare to segment table’s? Page table must reside in memory. Too large for registers alone.
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3. Paging Translation process if (virtual page # is invalid) { trap to kernel } else { physical page = pagetable[virtual page].physPageNum physical address is {physical page}{offset} }
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3. Paging What happens on a context switch? Copy out contents of entire page table Copy new page table into translation box (hideously slow) Instead, use indirection Change page table base pointer (register) Should point to new page table Does this look like anything else we’ve seen? Stack pointer
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3. Paging Pages can be in memory or swapped to disk “Swapped out” = “paged out” How can the processor know? Is it in physical memory or paged out to disk? Page table entry must have more info Resident bit
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3. Paging Resident bit in page table entry If bit is 1 (vp is in physical memory) Page table entry has valid translation Use to look up physical page If bit is 0 (vp is swapped out) MMU causes a page fault to OS (runs kernel’s page fault handler) (just like how timer interrupts are handled)
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3. Paging On a page fault, what does the OS do? OS finds free physical page (may have to page out another virtual page) OS does I/O to read virtual page into mem (or zero fills it, if it’s a new page) What happens next? OS reruns process’s at last faulting instruction How does it know the last instruction? Hardware provides process’s PC to handler on fault
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Valid vs. resident pages Resident = page is in memory Accessing non-resident pages is not an error Access triggers page fault, OS handles it Valid = page is legal to address Who makes a virtual page resident (or not)? OS memory manager (allocating physical memory)
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Valid vs. resident pages Resident = page is in memory Accessing non-resident pages is not an error Access triggers page fault, OS handles it Valid = page is legal to address Who makes a virtual page valid (or not)? User process controls this (with limits from OS)
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Valid vs. resident pages Resident = page is in memory Accessing non-resident pages is not an error Access triggers page fault, OS handles it Valid = page is legal to address Why would a process make a page invalid? Make the process fail-stop Accidental/buggy references kill the process Same for process making pages read-only (writes to code segment are probably bugs)
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