1. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The LHCb Inner Tracker Production: From A to Z Louis Nicolas LPHE – IPEP – SB – EPFL Monday Morning Seminar March 6th, 2006 LPHE-EPFL, Lausanne

2. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Inner Tracker in the LHCb Experiment (1/2) - The Inner Tracker (IT) is part of the Silicon Tracker (ST) as well as the Trigger Tracker (TT). - Silicon micro-strips detector covering a cross-shaped area around the beam pipe in each of the stations. - IT is formed by 3 stations (T1 – T3), each made of 4 boxes containing 28 modules. - Each module contains one or two silicon sensor with 128 strips each. - It is aimed at tracking particles in a region with really high particle flux. TT IT: T1-T3 2/24

3. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Inner Tracker in the LHCb Experiment (2/2) Recent pictures taken in the LHCb cavern: Space for the IT 3/24

4. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Construction and Production of the Inner Tracker The Inner Tracker is being built at this moment by several groups around the world: Lausanne, CH-->IT modules, cooling rods, frames, bonding and testing Zurich, CH-->Digitizer boards, Service boxes, sensor testing, data cables RHe, D-->Hybrids Heidelberg, D-->Hybrids (with beetles + pitch adapters) Hamamatsu, JP-->Sensors Santiago, ES-->Bonding, IT boxes, control card and testing 4/24

5. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Lausanne Lab for the IT: Production and Tests (1/5) If you worked in the Lausanne lab, you could look like this: Steps of the production performed in Lausanne: Production of the IT modules (from skin testing to sensor gluing) Construction of the IT frames Construction of the cooling rods Cooling tests Material Budget and XML modelling Writing of the voltage test code for the CERN lab burn-in stand 5/24

6. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Lausanne Lab for the IT: Production and Tests (2/5) IT modules production: some of the steps performed in Lausanne: 1) Raw ladder: 2) Ladder with glued hybrid: 3) Ladder with glued hybrid and sensor: Balcony (heat transfer) Pitch AdapterBeetles 6/24

7. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Lausanne Lab for the IT: Production and Tests (3/5) 7/24 4 IT boxes (one station) Space for beam pipe Readout cables Cooling pipes To service boxes This is the IT support frame as it will look in the real experiment (only with real boxes and slightly different cables):

8. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Lausanne Lab for the IT: Production and Tests (4/5) 8/24 The cooling rods have been built in Lausanne. Some tests are being performed to check that it’s not leaking and that the cooling power of C 6 F 14 is sufficient enough to cool down the sensors heating up in the experiment. A chair! Test support frame Cooling Rods with connectors Cooling Rods IT Box Dummy ladders with temperature sensors

9. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Lausanne Lab for the IT: Production and Tests (5/5) 9/24 An XML model of the IT has been implemented and we now have a realistic view of the material that composes the IT. Amount of material traversed by particles going through the Inner Tracker: IT BoxesData Cables

10. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 CERN Lab for the IT: Bonding and Testing (1/2) Bonds are used between the beetles and the hybrid, between the hybrid and the pitch adapter and between the pitch adapter and the sensor. Some pictures of the bonds on the hybrids: 50  m wires sealed using ultrasonic power 10/24

11. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 CERN Lab for the IT: Bonding and Testing (2/2) 11/24 Ageing test: 6 modules at a time in a temperature cycling box. -10 to 30°C (we could go up to 60°C). Voltage test at different stages during the temperature cycle. Electronics used is (almost) the same as in the real experiment. Several run are possible to test the modules. Modules builtModules bondedModules complete Accelerated ageing test: - Temperature Cycle - Voltage Test

12. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Electronics Related to the IT (1/3) TELL1 Board, by G. Haefli, EPFL: Off-detector electronics acquisition readout board for LHCb readout of optical or analog data from the front end electronics. FPGA based board for event synchronisation, buffering during the trigger latency, pre- processing including common mode correction and zero suppression. For data acquisition, interfacing to standard Gigabit Ethernet network equipment providing up to four GBE links. Two different link systems (analog and optical) -> receiver part implemented as mezzanine with either digitizer or de-serializer. Common interface on the receiver side -> same board for all sub-detectors. For ST: provide connectivity for 24 optical links de-serialized running at 1.6 GHz carrying the information of 24 x 128 strips sampled with 8-bit in total. The data is transferred on multiplexed 16-bit wide data buses running at 80 MHz. In addition at least the receiver clock, the data valid and the error control signals must be connected. 12/24

13. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Electronics Related to the IT (2/3) ODIN Readout Supervisor, by R. Jacobsson, CERN: Distribute the LHC clock to the entire FE electronics and the trigger systems. Distribute the L0 trigger decision to the L0 FE electronics. Distribute the L1 trigger decision to the L1 FE electronics (Not in the newest versions). Generate and time-in all types of self-triggers (random triggers, calibrations, etc.). Control the trigger rate by taking into account the status of the different components in the system in order to prevent buffer overflows and to enable/disable the triggers at appropriate times during resets, etc. Generate and time-in resets (counters- and electronics-) and the other asynchronous commands. Record detector status information and information related to timing, triggering and fast control in a special data block and transmit them to the event building Incorporate an ECS interface for configuring, controlling and monitoring the Readout Supervisor 13/24

14. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Electronics Related to the IT (3/3) 14/24 Digitizer Board, by A. Vollhardt, Zurich: Control Board, by D. Esperante, Santiago: Analog InDigital Out Communication to the beetles via the back plane and the Dig. board To the computer: SPECS master Gets analog signal from the beetles (via copper cables), digitizes it and sends it to the TELL1 via optical fibres. Gets commands from the Control board via the back plane and sends them to the beetles via the copper cables. Gets commands from the SPECS master (computer) and sends them to the beetles via the back plane, digitizer boards and copper cables. Gets commands from the Readout Supervisor and sends them to the beetles (like calibrations).

15. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The IT Burn-in Stand (1/3) This setup uses (almost) the same electronics as in the real experiment: TELL1 Board (left) Readout Supervisor (right) Service Box containing Control Card (left slot) Digitizer Boards (other slots) IT Modules Optical Fibres 5m Copper Cables For this burn-in test, we also use: Temperature Cycling Box 15/24

16. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The IT Burn-in Stand (2/3) About 1 minute to take data Up to 6 modules at a time (limited by size of the temp. cycling box) Temp Cycling daq.exe Control Card Readout Supervisor Dig Board Tell1 Temp Cycling Box Beetles LabView (Windows) LabView (Linux) Parallel Port TCP SPECS DAQ DIM sudo DAQ GBE link 16/24

17. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The IT Burn-in Stand (3/3) 17/24 List of the protocols / format / links used to send informations: TCP: Transmission Control Protocol. TCP is one of the core protocols of the Internet protocol suite. Using TCP, applications on networked hosts can create connections to one another, over which they can exchange data or packets. SPECS: Serial Protocol for the Experiment Control System of LHCb. The SPECS is a 10 Mbit/s serial bus, designed to be simple, cheap, reliable and to work in radiation sensitive environments. It is mainly used to download and read back the configuration of the electronics located on the detector. It provides I2C and JTAG interfaces for the users. I2C: Inter Components Communication, Inter Integrated Circuits. Simple bi-directional 2-wire bus for efficient Inter-Integrated Circuit Control. JTAG: Joint Test Action Group. JTAG is the usual name used for the Standard Test Access Port and Boundary-Scan Architecture for test access ports used for testing printed circuit boards using boundary scan. DIM: Distributed Information Management System. DIM is a communication system for distributed / mixed environments. It provides a network transparent inter-process communication layer. GBE: GigaBit Ethernet. Technologies for implementing Ethernet networking at a nominal speed of one gigabit per second. Ethernet is a frame-based computer networking technology for local area networks (LANs).

18. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Voltage Test Code in More Details (1/4) 18/24 Main goal: provide a code to analyse the behaviour of the beetles and test the readout strips. Old code exists but uses an obsolete version of the electronics boards (RB2, SEQSI) and is very slow (1 h / 1 module --> 1 min / 6 modules). Challenge: Communicate with the new boards (TELL1, Readout Supervisor and Control Card) to perform the wanted scans and get the data in a Root tree for further analyses. Several C/C++ codes have been written to: Initialize / Stop the electronics Run delay and/or pipeline scan Debug the whole setup

19. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Voltage Test Code in More Details (2/4) 19/24 Run: The two different scans can be run individually or in a row: Delay Scan: Short delay scan without saving data in order to find proper timing (peak) Pedestal Delay scan, saving data (to allow further investigation on the pulse shape) Channel scan (one every 8 channels on, with offset from 0 to 7) Pipeline Scan: Short delay scan without saving data in order to find proper timing (peak) Pipeline scan (from 1 to 187 = beetle pipeline length) Delay Scan: We delay the test pulse w.r.t. the trigger to sample each time at a different point on the test pulse and get a general view of the test pulse shape. Pipeline Scan: The beetles have a pipeline to store the signal with a length of 187 spaces. We change the offset (number of bunches inthe orbit before the trigger calibration is sent) to get each time the data from another pipeline column.

20. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Voltage Test Code in More Details (3/4) 20/24 The temperature cycle in more details: 1 Cycle (-10 o,0 o,10 o,20 o,30 o,20 o,10 o,0 o,-10 o ) lasts ~2h At each temperature, the box is stabilized and the DAQ code is ran: Data acquisition ~1.5 min: Pedestal: 4k events Delay Scan: 0.5k events * 2 masks * 21 delays Channel Scan: 0.5k events * 9 masks Pipeline Scan: 0.2k events * 187 PCN How to get data from the beetles to the computer: Computer sends command to the Readout Supervisor Readout Supervisor sends a calibration test pulse to the beetles Beetles send the analog signal back to the digitizer board Digitizer board passes digital signal to the Tell1 Readout Supervisor sends a trigger to the Tell1 Tell1 passes packets of data to the computer via GBE link Computer analyses the stream of data and saves it in a root file Reliability mechanisms have been implemented in case of RS or TELL1 failure: multi- threaded and temporized data readout. No packet is lost and the program exits in case of a time out due to a link error (RS spurious resets have been the most typical issue) (19 errors)

21. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 The Voltage Test Code in More Details (4/4) 21/24 [Program Settings] Configuration File Name = ConfigValues.txt Perform Delay Scan? yes Perform Pipeline Scan? no DIM DNS Node = "pcepfl01" Time Out Duration = 10 seconds [Program Settings / Delay Scan Settings] Delay Scan Number of Events = 256 Delay Scan Number of Pedestal Events = 2048 Delay Scan File 1 Name = Del_Module1 Delay Scan File 2 Name = Del_Module2 Delay Scan File 3 Name = Del_Module3 Delay Scan File 4 Name = Del_Module4 Delay Scan File 5 Name = Del_Module5 Delay Scan File 6 Name = Del_Module6 Delay Scan File 7 Name = Del_Module7 Delay Scan File 8 Name = Del_Module8 Estimated Peak Position = 75 and the same for the Pipeline Scan Settings [Temperature Cycling Box] Number of Modules = 8 Test Module 1? yes Test Module 2? no Test Module 3? yes Test Module 4? yes Test Module 5? yes Test Module 6? no Test Module 7? yes Test Module 8? yes [Beetle Parameters] Test Pulse Bias Current=0x60 Pre-Amplifier Bias Current=0x4C Shaper Bias Current=0x0A Front-End Buffer Bias Current =0x0A Pre-Amplifier Feedback Voltage =0x05 Shaper Feedback Voltage=0x00 Comparator Bias Current=0x05 Comparator RC Time Constant=0x00 Output Buffer Bias Current=0x99 Trigger Latency=0x60 etc... To give the user an easy way to control the run and the data, a configuration file has been implemented. Below are written some of the parameters that the user can set in this configuration file:

22. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Analysis (1/2) 22/24 © J. v. Hunen & H. Voss Once the scans have been performed, we need to analysis the data. Unfortunately, the new setup hasn’t been used yet. We only have plots for the old setup. Plots of the Delay Scan and the Temperature Cycling

23. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Analysis (2/2) 23/24 © J. v. Hunen & H. Voss One of the goals of the setup is to show if there are shorted or broken channels. This can be seen on a noise spectrum as shown below:

24. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 Conclusion 24/24 Peter and Marc-Olivier are producing the modules (almost) at full speed. The frames will be built by the Lausanne workshop on time to install them before the beam pipe. Aurélie and Marc-Olivier are finishing the cooling tests (last series of measurements). Kim and Aurélie are finishing the material budget and XML modelling (waiting for some information about the data cables after several changes already). The bonding at CERN has started again after a long break due to some material problems. The IT burn-in stand should start soon testing modules with the new setup, hence much faster (Daniel and I are waiting on Helge to analyse the first data we’ve produced to finish improving the code and maybe add a few more features). -------->Let’s be optimistic: Everything looks great!!!

25. Louis Nicolas – LPHE-EPFL IT from A to Z March 6th, 2006 In case it was not clear enough... Please refer to this book: