2. May 8, 20012 Undocumented UTMI Eric Huang and Ravikumar Govindaraman inSilicon Corporation

3. May 8, 20013 Typical USB 2.0 Application USB2.0USB2.0 USB2 PHY (USB2.0 Transceiver Macrocell) UDC20 (USB2.0 Device Controller) Application (USB2.0 function) UTMIAI

4. May 8, 20014 Features UTMI Recap w Peripheral only w 8 or 16 bit interface w HS, FS fallback w LS only in a separate implementation w FS only in a separate implementation w Vendor control and status

5. May 8, 20015 UTM Block Diagram

6. May 8, 20016 Hard to Implement w Challenging to implement rx_valid deassertion when 8 bits of stuffed bits are received with 8 bit interface w Challenging to implement tx_ready deassertion when 8 stuffed bits are transmitted w A nightmare to implement optional 16 bit or 8 and 16 bit interface in one transceiver instantiation w tx_hold_register and rx_hold_register should be renamed as tx_hold_buffer and rx_hold buffer

7. May 8, 20017 Why 8 or 16 Bit Interface for UTM w 16 bit interface – FPGA application development – Battery powered or bus-powered devices w 8 bit interface – Reduces package pricing by saving pins – ASIC/FPGA application development

8. May 8, 20018 Turn Around Time Bottleneck w HS turn around time 192 bit times (24 clocks in 8 bit interface and 12 clocks in 16 bit interface) w UTM may end up in consuming 103 bit times maximum in 8 bit interface w Assuming(may not be possible) 16 bit interface also consumes same bit duration (we have only 5/11 UTMI clock periods for UDC and application) w It is preferred to support both 8 and 16 bit interface in the same implementation

9. May 8, 20019 Turn Around Time Bottleneck w 16 bit interface allows 5 clock cycles for both UDC20 and application – This will force usb 2.0 application to use the same UTMI clock – Huge buffers(RAM) are needed for every endpoint depending on implementation. u Example Cypress USB 2.0 solution or inSilicon USB2.0 AHB solution. w 8 bit interface allows 11 clock cycles – Efficient trade off can be made between huge buffers or lower application operating clock frequency Continued

10. May 8, 200110 Problems Encountered w 1000 PPM clock tolerance tests – Simulation should be done with higher timescale resolution. u Example in fs(femto is 10 -15 seconds) otherwise tests fail w Check your results in different waveform viewers u Example Undertow waveform viewer gave wrong information in showing clocks

11. May 8, 200111 Why Not LS and FS Only in the Same Implementation w USB 2.0 does not allow LS device to act as a HS device w USB 2.0 host needs to support HS, FS, and LS w Vendors no need to maintain 1.1 transceivers and UDCs

12. May 8, 200112 Why Not HUBs and HOSTs? w USB 2.0 hub needs hub controller w HUB repeaters need elasticity buffer and DLL w HUB repeaters demand a serial interface at 480 Mhz w UTMI can be used for EHCI (host) application with additional signals w Additional host signals have been kept proprietary

13. inSilicon USB2 PHY FeaturesSupported 1 UTMI compliant (100%) 2 HS and FS fallback 16 bit unidirectional 3 HS and FS fallback 8 bit unidirectional 4 FS only 16 bit unidirectional 5 FS only 8 bit unidirectional 6 LS only 16 bit unidirectional 7 LS only 8 bit unidirectional 8 HS and FS fallback 16 bit bidirectional 9 HS and FS fallback 8 bit bidirectional 10 FS only 16 bit bidirectional 11 FS only 8 bit bidirectional 12 LS only 16 bit bidirectional 13 LS only 8 bit bidirectional 14 EHCI compliant 15 USB 2.0 HUB support 16 SoftDisconnect  17 Single chip USB 2.0 products. 18 Available in TSMC.18 19 Crystal requirement 20 Crystal clock support                   30 Mhz 48 Mhz inSilicon XtremeUTMI PHY  One solution for all generic UTMI PHY Discrete UTMI PHY 1 Proprietar y PHY 1 Discrete UTMI PHY 2 IP UTMI PHY 1 IP UTMI PHY 2  X  XXX  XXXX X XXXXX X XXXXX X XXXXX X XXXXX XX XXXX XXXXXX XXXXXX XXXXXX XXXXXX XXXXXX XXXXXX XXXXX  XXX NA NANANANANDANDA 30 Mhz 12 Mhz NANDANDA NA NAXX 48 Mhz NDANDA

14. May 8, 200114 USB OnTheGo w UTMI support peripheral only implementation w Additional signals will be require for USB OnTheGo implementations w inSilicon Hard TSMC Phy and Developers Kit Phy will support OTG out-of-the-box

15. May 8, 200115 Questions and Comments