1. FE boards test & production G. Auriemma, D. Fidanza & C. Satriano

2. Muon Meeting 06/04/2004 CERN G. Auriemma2 Summary Requirements Automatic chip testing Test capabilities in Potenza How can it be increased A duplicate system SPB production

3. Muon Meeting 06/04/2004 CERN G. Auriemma3 Schedule 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 1 2 NRE production NRE packaging NRE validation Production run CARIOCA tests DIALOG tests SYNC tests FE boards production FE boards assembling FE boards tests Chamber assembling FE IC packaging SYNC packaging 30k IC packaged 2004 20052006 Boundary assumptions: No MPW, but more time allowed for NRE preparation: NRE submission scheduled date is 30 th June 04 (start 15 th July) Chips’ turnarounds: we assume 3 months for NRE Run and 5 months for Prod. Run (could happen to be less) Test rate for CARIOCA: ~ 2k chips/month for NRE (or less), ~ 4k chips/month for production (mandatory) Test rate for DIALOG: ~ 1k chips/month for NRE (or less), ~ 2k chips/month for production (mandatory) Test rate for SYNC: ~ 800 chips/month (allowed to be less) Test rate for FE boards:the same as DIALOG rate (half the CARIOCA rate) Deliveries from the various production stages are organized in bunches. If the NRE Run fails, we loose ~ 5 months (depends on the entity of the problem) 5k SYNC pack’d Lab Company MinMax

4. Muon Meeting 06/04/2004 CERN G. Auriemma4 Requirements Test rate for chips: 800/week from 15/6/05 to 15/11/05 Test rate for boards: 400/week from 15/7/05-15/12/05

5. Chip testing

6. Muon Meeting 06/04/2004 CERN G. Auriemma6 Chip test protocol (mostly Werner’s comments) The system with counters and injectors that allows the measure of sensitivity and offset variations is already there (Rio-FEET) The question that still has to be settled is whether the injector rise time of about 10ns is good enough for our purposes.  Since pulse-width is a very crucial number for the system performance we need a TDC measurement. The discriminator output pulsewidth for 1 or 2 injected charge is therefore a crucial test parameter.  New injector (Potenza)a TDC in the chain (Rio)

7. Muon Meeting 06/04/2004 CERN G. Auriemma7 Goal of the chip test First goal is obviously to reject bad chips It seems not really necessary to calibrate each chip and write the calibration data to a database. We can decide to select chips according to a quality classification. The rejection level will be decided after measuring the first 100 or 200 chips from the production run.

8. Muon Meeting 06/04/2004 CERN G. Auriemma8 Manual/automatic chip handling 800 chips/week -> STD (INFN) week -> 2m10s/chip ZIF sockets have a limited operational life 5,000-10,000 insertions (?) CMOS technology is sensitive to statics

9. Muon Meeting 06/04/2004 CERN G. Auriemma9 Gravity feed handler

10. Muon Meeting 06/04/2004 CERN G. Auriemma10 55 (w) x 50 (d) x 50(h) cm3 13 kg Do we need an hot/cold test ?

11. Muon Meeting 06/04/2004 CERN G. Auriemma11 Capabilities For testing 500 to 5,000 devices a week Handles most electronic devices shipped in tubes (DIP, SIP, SOIC, SSOIC, PLCC, LCC, QFN, MLF, XTALS & Custom Conventional and Plunge-to-Board RF contacts ) 2 tube manual input 8 tube output with any combination sorts Table top operation; Micro terminal for current status, set up and diagnostics

12. Muon Meeting 06/04/2004 CERN G. Auriemma12 Contacts

13. Muon Meeting 06/04/2004 CERN G. Auriemma13 Contact pressure 10 to 12 grams / contact Contact height under 0.001” -70° C to +200° C temperature range Long life: over 1,000,000 contacts on rigid material; No wiping action required Same electrical characteristics as a solder connection: Contact resistance under 3 milliOhms Negligible capacity Negligible inductance Tested to 40 GHz

14. Muon Meeting 06/04/2004 CERN G. Auriemma14 Build the new injector card using a template custom card

15. Muon Meeting 06/04/2004 CERN G. Auriemma15

16. Boards testing

17. Muon Meeting 06/04/2004 CERN G. Auriemma17 Goal of the board test Verify assembly: –spot systematic errors with a fast feedback to the production –spot random errors (bad soldering etc.) Spot chips dead after tests Calibrate gains, offsets and pulse width (?) Create a data base (!)

18. Muon Meeting 06/04/2004 CERN G. Auriemma18 Test stand PulserDAC 32 ch VME scalers LabView software The test bench in Potenza

19. Muon Meeting 06/04/2004 CERN G. Auriemma19 The injector card

20. Muon Meeting 06/04/2004 CERN G. Auriemma20 The test system in Potenza has been modified with the insertion of a Service Board for the control of the DIALOG A new LabView code has been written, suitable for testing CARDIAC Main modification is scanning in injected charge at constant threshold, because DIALOG DAC has 10 mV resolution

21. Muon Meeting 06/04/2004 CERN G. Auriemma21 Service Board in the chain Provided by Rome I To be done

22. Muon Meeting 06/04/2004 CERN G. Auriemma22 Raw data (S-curve) Injected charge (fC) Ncounts/Nref

23. Muon Meeting 06/04/2004 CERN G. Auriemma23 Method 90% 10% Q Vth K  N

24. Muon Meeting 06/04/2004 CERN G. Auriemma24 Capabilities With the present system (1 board/test cycle) 20 boards in a day can be tested Expanding to a system with 4 boards we think we can go up to 80 boards in a day (not every day). How many boards/week ? With present manpower we estimate 160- 200 With one more operator perhaps 300-400 (marginally sufficient) Would be safer to duplicate the system with a cheaper solution

25. Muon Meeting 06/04/2004 CERN G. Auriemma25 SPB production Layout ok 120 PCB pre-series from CMT 10 SPB in production 120 could be ready next month After a first check we have decided to buy directly the components Some bids already got -> purchase will be done soon Goal: all components in our hand before June. (about 25,000 euros)

26. Muon Meeting 06/04/2004 CERN G. Auriemma26 PCB will be also ordered (bids asked) we estimate 25,000 euros Assembly can be contracted likely starting from July with additional funding Possible to have 50% in 2004 and the rest before June 2005 if funds are requested now