1. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 12015/11/23NTU DSD (Digital System Design) 20071 2007 DSD

2. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 22015/11/23NTU DSD (Digital System Design) 20072 Binary Codes

3. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 3 Conversion( 轉換 ) or Coding ( 編碼 ) Do NOT mix up conversion of a decimal number to a binary number with coding a decimal number with a BINARY CODE.  13 10 = 1101 2 (This is conversion)  13 ←→ 0001|0011 (This is coding) Data ( 資料表示法 ) Type of Digitalized Data  Numeric ( 數值資料 )  可進行加、減、乘、除等算術運算的資料  Character or Alpha Numeric ( 文數資料 )  不能拿來運算的資料 常見的數值表示法可以分成兩大類  整數  實數 ( 分數 / 浮點數 ) 整數與實數最大的差別是  實數能夠表示包含小數的數值資料

4. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 4 Sign-Magnitude Format Positional representation using n bits  X = X n X n-1 X n-2 … X 1 X 0 Sign-magnitude format  Left most bit position (X n) is the sign bit, only bit that is complemented  0 for positive number  1 for negative number  Remaining n-1 bits represent the magnitude Min:-(2 n - 1)= 1111 1111 (-127) Max:+(2 n - 1)= 0111 1111 (+127) Zero:-0= 1000 0000 Zero:+0= 0000 0000

5. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 5 Ones Complement Format (1 的補數 ) Negative numbers are represented by a bit-by-bit complementation ( 對所 有 bit 做補數運算 ) of the (positive) magnitude (the process of negation) Sign bit interpreted as in sign-magnitude format Examples (8-bit words):  +42= 00101010  -42= 11010101 Min:- (2 n - 1)= 1000 0000 (-127) Max:+(2 n - 1)= 0111 1111 (+127) Zero:- 0= 1111 1111 (0) Zero:+0= 0000 0000 (0)

6. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 6 Twos Complement Format (2 的補數 ) Most significant bit is the “sign bit”. Twos Complement = Ones Complement + 1 Number representation is not symmetric. ( 非對稱式表示 ) Only one representation for zero. Easy to negate, add, and subtract numbers. A little bit trickier for multiply and divide. Examples (8-bit words):  +42= 00101010  -42= 11010101 (1’s Complement)  -42 = 11010110 (2’s Complement) = 11010101 + 00000001 Min:- (2 n )= 1000 0000 (-128) Max:+(2 n - 1)= 0111 1111 (127) Zero:= 0000 0000 (0)

7. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 7 Signed 2’s Complement Addition Add the two numbers, including their sign bit, and discard any carry out of left-most (sign) bit Examples 60 0110 150 1111 90 1001 +60 0110 -31 1101 -91 0111 +90 1001 181 0010 90 1001 +-61 1010 310 0011 90 1001 +-91 1010 -1810 1011 -91 1001 + Overflow

8. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 8 Detecting 2’s Complement Overflow When adding two's complement numbers, overflow will only occur if the numbers being added have the same sign but the sign of the result is different If we perform the addition Overflow occurs when a n-1 = b n-1 but ≠ s n-1  signs of both operands are the same, and sign of sum is different. 90 1001 181 0010 90 1001 + -91 1010 -1810 1110 -91 1001 +

9. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 9 Signed 2’s Complement Subtraction To subtract two's complement numbers we first negate the second number and then add the corresponding bits of both numbers. Examples: 30011 20010 - 1000130011 -21110 + -31101 -21110 - 1111-31101 20010 + -31101 20010 - -51011-31101 -21110 + 30011 -21110 - 5010130011 20010 +

10. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 10 Zero Extension ( 零擴展 ) Assembly  When you copy a smaller value into a larger destination, the MOVZX instruction fills (extends) the upper half of the destination with zeros.  mov bl,00001111b  movzx ax,bl; zero-extension 00001111 00000000 0Source Destination 00001111 00000000 00001111 15

11. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 11 Sign Extension ( 符號擴展 ) Assembly  The MOVSX instruction fills the upper half of the destination with a copy of the source operand's sign bit.  mov bl,10001111b  movsx ax,bl; sign extension 10001111 11111111 Source Destination 10001111 11111111 10001111 -113 01110001 10001110 10001111 113 1+16+32+64=113 1’s 2’s -113

12. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 12 Fractions ( 分數 ): Fixed-Point How can we represent fractions?  Use a “binary point” to separate positive from negative powers of two -- just like “decimal point.”  2’s complement addition and subtraction still work.  if binary points are aligned 2 -1 = 0.5 2 -2 = 0.25 2 -3 = 0.125 00101000.101 40.625 00000001.010 11111110.101 11111110.110 1.25 1’ Comp -1.252’ Comp -1.25 + 00100111.011 39.375

13. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 13 Very Large and Very Small Number Large values: 6.023 x 10 23  602,300,000,000,000,000,000,000  Requires 79 bits Small values: 6.626 x 10 -34  0.000,000,000,000,000,000,000,000,000,000,000,662,6  Requires >110 bits Use equivalent of “scientific notation”: F x 2 E  Need to represent  F or M (fraction 分數 /Mantissa 浮點數 )  E (exponent 指數 )  Sign ( 正負號 ) IEEE 754 Floating-Point Standard (32-bits): SExponentFraction or Mantissa 1b8b23b

14. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 14 Floating Point Number Representation If x is a real number then its normal form representation is: x = f Base E  Where  f : mantissa  E: exponent Example:  125.3210 = 0.12532 10 3  - 125.3210 = -0.12532 10 3  0.054610 = 0.546 10 –1 The mantissa is normalized, so the digit after the fractional point is non- zero. ( 小數點以下的第一位數為非零 ) In binary, the leading digit is always 1, so it is normally hidden. If needed the mantissa should be shifted appropriately to make the first digit (after the fractional point) to be non-zero & the exponent is properly adjusted. Mantissa Exponent

15. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 15 Normalizing Numbers 134.1510 = 0.13415 x 10 3 0.002110 = 0.21 x 10 -2 101.11B =.10111 x 2 3 or 1.0111 x 2 2 (hidden1) 0.011B =.11 x 2 -1 or 1.1 x 2 -2 (hidden1)

16. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 16 Recall: BCD Code 0 10 = 0000 2 1 10 = 0001 2 2 10 = 0010 2 3 10 = 0011 2 4 10 = 0100 2 5 10 = 0101 2 6 10 = 0110 2 7 10 = 0111 2 8 10 = 1000 2 9 10 = 1001 2 10 10 = 0001 0000 2 = 0011 Exc-3 = 0100 Exc-3 = 0101 Exc-3 = 0110 Exc-3 = 0111 Exc-3 = 1000 Exc-3 = 1001 Exc-3 = 1010 Exc-3 = 1011 Exc-3 = 1100 Exc-3 Excess-3 Code ( 超三碼 ) 互補

17. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 17 Excess (Biased) Representation ( 超碼表示法 ) Effectively moves the scale  The “all-zeros” means the largest negative number ( 最大的負數 )  The “all-ones” means the largest positive ( 最大的正數 ) 8 bit excess-127 representation  0 representation 0111 1111  Largest positive 1111 1111 (+128)  Largest negative 0000 0000 (-127) 1111 1111+128 1111 1110+127 … 1000 00001 0111 11110 0111 1110-1 … 0000 0001-126 0000 0000-127

18. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 18 IEEE Standards for Floating-Point Representation 1823 Excess 127 SignExponentMantissa Single Precision Double Precision 111 52 Excess 1023 SignExponentMantissa

19. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 19 Single Precision IEEE Standards The sign field for mantissa is 0 for positive or 1 for negative In the mantissa, the decimal point is assumed to follow the first ‘1’. Since the first digit is always a ‘1’, a hidden bit is used to representing the bit. The fraction is the 23 bits following the first ‘1’. The fraction really represents a 24 bit mantissa. The exponent field has a bias of 127. 1823 Excess 127 SignExponentMantissa

20. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 20 Some Special Numbers Prefix & Symbol 10 0 : One 10 1 : Ten (Deca / da) 10 2 : Hundred (Hetco / h) 10 3 : Thousand (Kilo / k) 10 6 : Million (Mega / M) 10 9 : Billion (Giga / G) 10 12 : Trillion (Tera / T) 10 15 : Quadrillion (Peta / P) 10 18 : Quintillion (Exa / E) 10 21 : Sextillion (Zetta / Z) 10 24 : Septillion (Yotta / Y) 10 -1 : Tenth (Deci / d) 10 -2 : Hundredth (Centi / c) 10 -3 : Thousandth (Milli / m) 10 -6 : Millionth (Micro / μ ) 10 -9 : Billionth (Nano / n) 10 -12 : Trillionth (Pico / p) 10 -15 : Quadrillionth (Femto / f) 10 -18 : Quintillionth (Atto / a) 10 -21 : Sextillionth (Zepto / z) 10 -24 : Septillionth (Yocto / y)

21. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 21 Quiz Solution 1) Please use 16 bit system & twos complement method perform AC00 16 + 1234 10 – 6740 8 and please representation the result into Excess-127 Code  AC00 16 = 1010 1100 0000 0000  1234 10 = 4D2 = 0000 0100 1101 0010  6740 8 = 110 111 100 000 = 0000 1101 1110 0000 = 1111 0010 0001 1111 1s = 1111 0010 0010 0000 2s  1010 1100 0000 0000 + 0000 0100 1101 0010 = 1011 0000 1101 0010  1011 0000 1101 0010 + 1111 0010 0010 0000 = 1) 1010 0010 1111 0010  1010 0010 1111 0010 + 0000 0000 0111 1111 = 1010 0011 0111 0001 Excess-127

22. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 22 Quiz Solution 2) Please extension the results in 1) into 32 bit system and translate it into Decimal Since 1)’s Solution is 1010 0011 0111 0001 Excess-127 The Real Value is 1010 0011 0111 0001 Excess-127 – 0000 0000 0111 1111 = 1010 0010 1111 0010 Sign Extension to 32-bit System = 1111 1111 1111 1111 1010 0010 1111 0010 1111 1111 1111 1111 1010 0010 1111 0010 2s => 1111 1111 1111 1111 1010 0010 1111 0001 1s => 0000 0000 0000 0000 0101 1101 0000 1110 2 0000 0000 0000 0000 0101 1101 0000 1110 = 23822 So, answer is -23822

23. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 23 Quiz Solution 3) Please convert Decimal -0.001234 x 10 13 into IEEE Single Precision Binary format -0.001234 x 10 13 = -1.234 x 10 10 1.234 x 10 10 = 12340000000 10 = 2DF857500 16 = 0010 1101 1111 1000 0101 0111 0101 0000 0000 To Floating Point = 1.0 1101 1111 1000 0101 0111 0101 0000 0000 x 2 33 33 10 = 0010 0001 2 => 0010 0001 + 0111 1111 = 1010 0000 Excess-127 IEEE Single Precision Binary format = 1 10100000 01101111110000101011101 = 1101 0000 0011 0111 1110 0001 0101 1101

24. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 24 Quiz Solution Reference Reference: http://www.h-schmidt.net/FloatApplet/IEEE754.html

25. 2015/11/23 Jackie Kan - 2007 (jackiekan@LinTon.1D24H.com/jackiekan@csie.ntu.edu.tw) http://linton.1d24h.com/~jackiekan/ 25 Quiz Solution 4) Please convert IEEE Single Precision 7EC0000F 16 into Decimal format 7EC0000F 16 = 0111 1110 1100 0000 0000 0000 0000 1111 2 = 0 11111101 10000000000000000001111 IEEE 11111101 Excess-127 => 1111 1101 – 0111 1111 = 0111 1110 2 = 126 10 7EC00000F16 => +1.10000000000000000001111 x 2 126 ( 有算至此就給分 ) +1.10000000000000000001111 x 2 126 => 2 126 = 8.5070591730234615865843651857942 x 10 37 => 1.10000000000000000001111 = 1 + 1/2 1 + 1/2 20 + 1/2 21 + 1/2 22 + 1/2 23 ≒ 1.5 1.5 x 8.5070591730234615865843651857942 x 10 37 ≒ 12.760588759535192379876547778691 x 10 37 ≒ 1.27606 x 10 38 5) BD660000 => -5.6152344e-2