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Vertex detector for the KEK B factory upgrade Toru Tsuboyama (KEK) 1 March 2008 Instr08 Novosibirsk
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Introduction 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK) 2
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1 March 2008 Novosibirsk Silicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK) 3 Super Belle detector (LoI ‘04) SC solenoid 1.5T New readout and computing systems Aerogel Cherenkov counter + TOF counter / K L detection 14/15 lyr. RPC+Fe tile scintillator CsI(Tl) 16X 0 pure CsI (endcap) “TOP” + RICH Tracking + dE/dx small cell + He/C 2 H 6 remove inner lyrs. use fast gas Si vtx. det. 4 lyr. DSSD 2 pixel/striplet lyrs. + 4 lyr. DSSD
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Purpose of the Silicon Vertex Detector SVD reconstructs two vertices of B decay. B flight length ~ 200 m. The CP violation parameters are extracted from the distribution of distance between two vertices. Silicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)4 Belle 2005 J/ KSKS ee ee Decay time difference tt Belle SVD (4 layer) 50 cm 20 cm 1 March 2008 Novosibirsk
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Super KEKB upgrade The present KEKB has established the CP violation in the framework of the Standard Model by using ~1 ab -1 of data. Further investigations needs 10-50 ab -1 data. Examination of the unitarity of the CKM matrix. Measurement of the CP violation phase coming from Penguin diagrams. Rare decay of the B mesons, charmed mesons and lepton flavor violation of . Any deviation from the standard model prediction suggests existence of new phenomena such as SUSY. A Super B factory with L=10 35 -10 36 /cm 2 /sec is necessary. Measurements by LHC and Super B factory experiments are complementary. 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)5
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1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)6
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Current SVD 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK) 7
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Present SVD 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)8 Has been working since 2003 Autumn. 4 layer DSSD ladders are read out with VA1TA chips. DSSDs Kapton flex circuit VA1TA r = 2.0, 4.35, 7.0, 8.8 cm
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Limitations of the present SVD 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)9 Readout ASIC: VA1TA VA1 is an excellent ASIC designed for the KEK B factory. Each event causes a dead time of about 30 sec. 5 % dead time at 1.6 KHz trigger rate. No problem at the current trigger rate of 500 Hz. Hit occupancy of the innermost layer. KEKB luminosity exceeded the design value. So do the beam backgrounds entering to SVD. At occupancy larger than 10 %, vertexing performance will be deteriorated significantly. Shaping time of VA1TA, 0.8 sec, is longer than that of modern readout chips. Four layer design. Vertexing and self tracking is possible, though, the redundancy is minimum. Occupancy in the first layer Hit finding efficiency
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Our choice 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)10 6 layer For robust vertexing and tracking Outer radius: 14 cm High Ks reconstruction efficiency Inner radius: 1.0 cm For better vertex resolution. Readout chip: APV25 Reduction of occupancy from beam background. Pipelined readout to reduce readout dead time. Sensor of the innermost layer: Normal DSSD Short-strip DSSD Pixel sensors Depends on the available technology Background is proportional to the sensitive area per channel.
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Design philosophy of the upgrade SVD 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)11 Requirements from physics To reconstruct vertices of two B mesons with ~100 m resolution. Reconstruct slow pions decaying from D*. Lager radius in order to improve Ks reconstruction efficiency. Better impact parameter resolution would result in better suppression of continuum events. Constraints Ready for physics at the Super KEK B factory commissioning Immunity to the expected backgrounds from the accelerator. Effects of material should be carefully evaluated and minimized. Data acquisition Should work efficiently at the luminosity goal of ~10 36 /cm 2 /sec. Pipelined readout to minimize the dead time. Negligible dead time at 10 kHz average trigger rate.
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Detector configuration 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)12 6 layers for robust tracking. R=1.0 cm beam pipe. First layer R=1.3 cm. Outermost layer: R=14 cm. Acceptance of Ks is increase by 15 %. Slanted sensors: Reduce sensor area and number of readout channels. Material is also saved. r =150mm (cm) 17°
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Readout system 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK) 13
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Readout with APV25 ASIC Developed for CMS Silicon tracker. Shaping time of the preamplifier: 50 nsec Occupancy: 1/16 compared with VA1TA (800 nsec). Operated with 40MHz clock 192 stage pipeline (~4 µsec trigger latency) Up to 32 readout queues 128 ch analog multiplexing (3 µsec@40 MHz) Dead time: negligible at expected trigger rate of 10 kHz 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)14 Shaper Inverter preamp 192 stageAnalog Pipeline (4 µsec) Analog output Trigger 128 channel Multiplexer (3 µsec) Noise= (246 + 36/pF) @50nsec
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Hit timing reconstruction KEK B-Factory: 2 nsec bunch crossing Built-in deconvolution filter (assuming the LHC 25 nsec bunch crossing) can not be used. Hit time reconstruction Read out 3, 6 … slices in the pipeline. Extract the hit timing information from the wave form. Proved in beam tests: Resolution ~ 2 nsec. 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)15 Shaper Trigger
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APV25 readout system 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)16 Readout scheme suitable for Belle has been developed: Hybrid, Repeater system, FADC and DAQ. Series of beam test has been done by in order to understand APV25 and to accumulate experiences. Nov. 2007: The first experiment at the KEK new test beam line. Demonstration of the new DSSD sensor, hybrid, repeater and FADC. CM subtraction, cluster search and hit- time reconstruction done in FPGA is tried. Poster presentation by Vienna HEPHY group in this conference.
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Chip-on-sensor concept 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK) 17
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Chip-on-sensor readout 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)18 APV25 has a steeper noise slope than VA1TA VA1TA Noise=(180+7.5/pF) e / APV25 Noise=(180+ 36/pF) e Several DSSDs can be read out with one VA1TA hybrid. In case of APV25, a DSSD should be readout by one hybrid. Chip-on-sensor concept. Mounting APV25 chips directly on sensors. Increase of material due to not only chip itself but also support and cooling structure should affect the vertex performance.
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Effects of material increase In order to evaluate the performance of 6 layer SVD with APV25 chip-on- sensor design, intensive simulations have been done. Results have been reported in the workshop by A. Kibayashi. Conclusions are Chip on sensor readout for the innermost 2 layers would deteriorate the vertex performance. Material increase in layer 3-6 does not reduce the vertex performance significantly. High-multiplicity events (D+D-) is especially sensitive to material. B K* is special as only Ks can be used to estimate the B decay vertex. Efficiency improves thanks to layers 5 and 6. 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)19 Bench mark B + -B J/ Ks B D+D- B K* No “chip-on-sensor” =31 m =38.7 % =36 m =24.9 % =43 m =13.2 % =127 m “chip-on-sensor” in Layers 1 and 2 =34 m =38.3 % =40 m =24.6% =51 m =12.7 % “chip-on-sensor” in Layers 3 and 4 =31 m =38.1 % =36 m =24.5 % =42 m =12.6 % =137 m (T. Hara)
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DSSD and pixel sensor R&D 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK) 20
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DSSD 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)21 HPK stopped DSSD production. Single sided sensors are too thick to be used in e + e - B factories. New DSSD sources Micron semiconductor, UK. Experienced with Babar, LHCb, CDF, D0 …. Can produce 300 m-thick DSSDs from 6” diameter wafers Design flexibility. Tata institute (Belle collaborator) Produced single-sided sensors for the CMS experiment. DSSD production is in progress with a foundry in Bangalore. The sample will be available in April or May. Kyumpook Univ. (Belle collaborator) AC-coupled single-sided and DC coupled double- sided sensors are now under evaluation. Design of an AC-coupled double-sided sensors are in preparation.
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Striplet option The innermost layer suffers huge beam background. Occupancy reduction by APV25 may not be sufficient By inclining the strips by 45 degrees, strip area per readout channel can be reduced to almost 1 / 4, in expense of 4x readout channels. 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)22 Striplet
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Striplet 2003 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)23 Parameterspn Sensitive area (mm 2 )71.0x7.9 Strip length (mm)10.5 Strip pitch (µm)25.5 (p)51 (n) Readout pitch (µm)51 (p)51 (n) Num. of readout ch.1024 Bias resistor (M ) >10 71 mm 7.9 mm
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Monolithic pixel sensors Pixel sensors are the solution to reduce the hit occupancy. Monolithic pixel sensor should be used. Hybrid sensors are too thick to be used in B factories. Innermost layer can be replaced with pixel sensor later. January 2007 submissions. CAP (Hawaii) --- Monolithic Pixel Sensor project Several iterations have been done. CAP7 --- the concept is implemented in SOIPIX. Binary readout. SOIPIX (KEK, TIT et al.) Continuous amplifier, time-over-threshold and simple digital pipeline is implemented. 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)24 CAP7
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Summary 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK) 25
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SVD construction schedule 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)26
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The SVD upgrade kick-off meeting 1 March 2008 NovosibirskSilicon Vertex Detector for the KEKB factory upgrade Toru Tsuboyama (KEK)27 20 Feb 2008, just before this BPAC. Summary of the 3 to 4 years R&Ds. Please visit http://kds.kek.jp/conferenceDisplay.py?confId=865http://kds.kek.jp/conferenceDisplay.py?confId=865 Today’s presentation is a summary of this meeting. Overview 09:30 Schedule (T. Tsuboyama, KEK) 09:40 CDC inner radius (S. Uno, KEK) 09:45 Beam pipe (H. Yamamoto, Tohoku) 09:55 Overall design (T. Kawasaki, Niigata) 10:25 Structure / Ladder (O. Tajima, KEK) Electronics I 11:15 Pixel, ASIC... (G. Varner, Hawaii) 11:45 Pixel-- SoI technology (H. Ishino, TIT) DSSD 13:00 HPK/Micron (T.Tsuboyama, KEK) 13:10 DSSD in Korea (H. Hyun, Kyungpook) Software 14:00 Overview (T. Hara, Osaka) 14:20 Demonstration for the Fallback option (Y.Kuroki, Osaka) 14:40 Simulation for Baseline option (A.Kibayashi, KEK) 15:00 Pixel Simulation (H. Hoedlmoser, Hawaii) 15:10 Tracking for SVD5.1 ? (K.Trabelsi, KEK) 15:30 Requirement for Alignment precision (T.Hara, Osaka) Performance study 16:00 Outer layer (I) radii (T.Hara for S.Shinomiya, Osaka) 16:10 Outer layer (II) S/N and readout ptch (, Niigata) 16:20 Material --- ASIC on DSSDs (T.Hara, Osaka) 16:30 Readiness of fsim6 (C. Schwanda, Vienna) Electronics II 17:00 APV25 and APV25 hybrid (C. Irmler, Vienna) 17:10 DAQ overview (M. Friedl / M. Pernicka, Vienna) 17:40 Activities in Cracow (H. Palka, INP Cracow) 18:00 Monitors (S. Stanic, Nova Gorica) 18:20 Diamond radiation monitor (S. Korpar, Ljubljana)
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