1. UHD:CS2401: A. Berrached1 The Intel x86 Hardware Organization

2. UHD:CS2401: A. Berrached2 The 8086 Processor Bus Control Unit Execution UnitBus Interface Unit CS DS SS IP Internal Bus ALU Flags Reg. AX BX CX DX BP DI SI SP Instruction Queue Control Unit System Bus

3. UHD:CS2401: A. Berrached3 Internal Memory 4 256 KB of ROM and 768 KB of RAM Conventional Memory Upper Memory 640K memory (RAM) 128k video display area (RAM) 192k memory expansion area (ROM) 64K base memory ROM 0 00000 640K A0000 9FFFF 768K C0000 960K F0000 Starting Address

4. UHD:CS2401: A. Berrached4 4 The Internal memory of the 8086 can be up to 1 M bytes large. 4 How many bits are needed to express memory addresses ? Answer: 1 Meg = 2 20 => 20-bit addresses

5. UHD:CS2401: A. Berrached5 The 8086 Register Set 4 Segment Registers: CS, DS, SS, ES 4 General-Purpose Registers:AX, BX, CX, DX 4 Pointer RegistersSP, BP 4 Index Registers:SI, DI 4 Instruction Pointer IP 4 A Flags Register For the 8086, all registers are 16-bits large Bits in registers are numbered right to left, starting from 0.

6. UHD:CS2401: A. Berrached6 Registers Low-order byteHigh-order byte Example: Store 17F6H in register 17F6

7. UHD:CS2401: A. Berrached7 General-Purpose Registers 4 AX, BX, CX, DX all 16-bits large AX: Accumulator register BX: Base register CX: Count register DX: Data register 4 You can address them as one word or 1 byte. 4 E.g.: 4 All other registers must be accessed as the 16-bit. AHALAX:

8. UHD:CS2401: A. Berrached8 MOV instruction: copies data from one location into another. MOVDestination, Source; Copy source to dest. E.g. MOVDX, CX Copies contents of register CX into register DX. 4 The MOV instruction does not effect the source operand 4 But Source and destination must be of same size. MOVAH, BH; MOVAH, BX; Can’t do Using General-Purpose Registers

9. UHD:CS2401: A. Berrached9 Unising General-Purpose Registers MOV AX, 3D2BH ; load 3D2BH into AX MOV BH, 42H ; load 42H in high byte of BX ADD AL, 32H ; add 32H to AL Note: 80386 and later processor have 32-bit extended versions: EAX, EBX, ECX, and EDX MOV EAX, FF22AA00H ; (386 & up)

10. UHD:CS2401: A. Berrached10 Program Segments 4 A segment is an area in memory that includes up to 64K bytes and begins on a paragraph boundary; ie. on an address evenly divisible by 16. Note: When an address is evenly divisible by 16 (i.e. 10H), its least significant four bits are 0s. => How many bits are needed for segment starting address? 16-bits 4 A program usually has one code segment (for the code), a data segment (for the data used by the program) and a stack segment.

11. UHD:CS2401: A. Berrached11 Program Segments 4 The three types of segments are –code segment: contains machine instructions that make up the program. The starting address of the code segment is stored in the Code Segment (CS) register –data segment: contains the data used by the program. The address of the data segment is stored in the Data Segment (DS) register. –stack segment: the stack is used for temporary storage to save data temporarily or during subroutine calls. The address of the stack register is stored in the Stack Segment (SS) register.

12. UHD:CS2401: A. Berrached12 Segment Registers 4 So when writing a program you always need to: –load CS with the starting address of the code segment –load DS with the starting address of the data segment –load SS with the starting address of the stack segment 4 All addressing within the program is done relative to segment registers.

13. UHD:CS2401: A. Berrached13 Relative Addressing--Offset Address 4 The distance in bytes from a segment address to another location within the segment is called the offset address. 4 the first byte of a segment is at offset address 0 4 the second byte is at offset 1 4 An offset can range from 0 to 65,535 (0000-FFFF) => offsets are expressed as 16-bit unsigned binary numbers.

14. UHD:CS2401: A. Berrached14 Relative Addressing--Logical Address 4 Generally, memory locations are expressed as Segment_Register:Offset meaning that the address is “Offset” bytes from the starting address of the segment. This is what is called the logical address. Example: DS:17H

15. UHD:CS2401: A. Berrached15 Relative Addressing--Physical Address 4 The physical address is the actual RAM or ROM address. In the 8086, it is a 20 bit address. 4 How to compute the physical address of Seg_Reg:Offset ? –Shift the Seg_Reg left one Hex digit (pad with 0 at the right). –Add the Offset.

16. UHD:CS2401: A. Berrached16 Relative Addressing: Example 4 Data segment starting address is 027A0H => DS register 4 Because segment starting addresses must be evenly divisible by 16, the leftmost hexadecimal digit is always 0. => The leftmost hex digit of a segment starting address is not stored in the segment register. 0 27 A

17. UHD:CS2401: A. Berrached17 4 Assume we need to access data stored in the 24th byte of data segment => offset = 17H Logical address: DS:17H Physical address: Start with DS: 027A Shift left DS: 027A0 Add offset + 17 -------------- 027B7 H

18. UHD:CS2401: A. Berrached18 Pointer Registers 4 Instruction Pointer (IP) register 4 Stack Pointer (SP) register 4 Base Pointer (BP) register

19. UHD:CS2401: A. Berrached19 Instruction Pointer 4 The IP register always Points to the next instruction to be executed. I.e. its contains the offset address of the next instruction that is to execute. 4 The address of the next instruction to be executed is formed by adding the content of IP to that of CS. CS:IP The IP register is always associated with the CS register.

20. UHD:CS2401: A. Berrached20 Stack Pointer register 4 The SP contains the offset address of the top of the stack 4 The SP register is always associated with the SS (Stack Segment) register SS:SP

21. UHD:CS2401: A. Berrached21 Base Pointer register 4 The BP register is used to facilitate referencing parameter (on function calls) 4 The BP register is also associated with the SS register.

22. UHD:CS2401: A. Berrached22 Flags Register 4 A 16-bit register 4 80386 and later processor have a 32-bit flags register 4 Each bit indicates a certain status: example: Overflow, Carry, Interrupt 4 Many instructions change the status of the flags 4 Some instruction test for certain bits of the flag register before taking action –example: JO; jump if overflow bit is set

23. UHD:CS2401: A. Berrached23 Addressing of operation and data 4 An instruction consists of –at least one operation (e.g., ADD, MOVE) –zero, one or more operands (to reference the data) –Generally, the first operand is the destination example: MOV AX, 25; Immediate operand MOV BX, AX; register to register

24. UHD:CS2401: A. Berrached24 Addressing of operation and data 4 More examples: MOV AL, [0034]; indexed addressing –Physical address of operand = DS:34H => the [ ] indicate that the physical address of the operand is computed by taking what’s between the [ ] as an offset and adding it to DS

25. UHD:CS2401: A. Berrached25 Addressing … - Cont. 4 An instruction may access more than one byte at a time e.g., MOV AX, 35F3H MOV[1500], AX This instruction will copy the contents of AX (i.e. 35F3H) in two 2 memory locations starting at address DS:1500. How are the two bytes arranged? Little endian convention: low order byte in low order memory address

26. UHD:CS2401: A. Berrached26 Little endian convention Assume DS = 3146[0]H => DS:1500 = 32960H 3296032961 Memory …. AX: AHAL F3 35F3 35

27. UHD:CS2401: A. Berrached27 Instruction Operands Some More Examples: X1DW0; Define X1 as a word ….. MOVCX, X1; Move X1 to CX MOVCX, 25; Move 25 to CX MOVCX, DX; Move content of DX to CX MOVCX, [DX]; Indexed addressing => to get actual address of operand: use content of DX as an offset and add it to DS => actual address = DS + DX

28. UHD:CS2401: A. Berrached28 Debug program 4 A debugger program for x86 Assembly 4 used to: –enter machine code –enter assembly code –write small programs (.COM files) –debug assembly programs

29. UHD:CS2401: A. Berrached29 DEBUG Commands –A: Assemble assembler instructions into machine code –D: Display contents of memory at a specific address –E: Enter data/instruction into memory –G: (Go) run the program – T: Trace –P: Proceed: execute a set of instruction –R: display contents of Registers –W: Write (I.e. save) a program into disk –Q: Quit See Appendix E of Text book.

30. UHD:CS2401: A. Berrached30 DEBUG 4 Few Basic Rules –case insensitive –uses the colon format (e.g., segment:offset) –uses hexadecimal notation –use a space to separate parameters

31. UHD:CS2401: A. Berrached31 Debug - Cont. 4 Examples: –D DS:200 –E CS:100 B8 23 01 01 05 25 00 –R AX=BX=………….. ………….. nnnn:0100 B82301MOVAX, 0123

32. UHD:CS2401: A. Berrached32 D: Display Memory Content 4 Address| Hex representation | ASCII xxxx:xx 10 xx…....xx-xx..…..xx x…….x xxxx:xx 20 xx…....xx-xx..…..xx x…….x xxxx:xx 30 xx…....xx-xx..…..xx x…….x …... xxxx:xx 80 xx…....xx-xx..…..xx x…….x

33. UHD:CS2401: A. Berrached33 Machine Language Example Machine LangAssembly Lang B82301MOV AX, 0123 052500ADD AX, 0025 8BCBMOV CX, BX 90NOP

34. UHD:CS2401: A. Berrached34 Debug Operations 4 Keying in program instructions 4 Executing program instructions 4 Displaying memory contents 4 Correcting an entry

35. UHD:CS2401: A. Berrached35 ML Example: Defined data E CS:100 A1 00 02 03 06 02 02 ……. E DS:0200 23 01 25 00 00 00 ……. To view code:D CS:100,105 To view data:D DS:200,205

36. UHD:CS2401: A. Berrached36 An assembly Language Example 4 Assemble Command: A 100 MOV CL, 42 MOV DL,2A ADD CL, DL NOP

37. UHD:CS2401: A. Berrached37 An assembly.. - Cont. 4 Unassemble command U 100,106 xxxx:0100 B142MOV CL, 42 xxxx:0102 B22AMOV DL, 2A xxxx:0104 00D1ADD CL,DL xxxx:0106 90NOP

38. UHD:CS2401: A. Berrached38 More on Debug 4 If you are executing a program again within the DEBUG make sure to reset IP register to 100. –R IP : 100 4 Saving a program from within debug use A or E to key in the code N filename.COM clear BX replace CX with the size of the program W