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Penn ESE370 Fall2013 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 18: October 14, 2013 Energy and Power.

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Presentation on theme: "Penn ESE370 Fall2013 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 18: October 14, 2013 Energy and Power."— Presentation transcript:

1 Penn ESE370 Fall2013 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 18: October 14, 2013 Energy and Power Basics

2 Previously Where capacitance arises What drives delay –How to optimize Penn ESE370 Fall2013 -- DeHon 2

3 Today Power Sources Static Capacitive Switching Short Circuit (Day 19) Penn ESE370 Fall2013 -- DeHon 3

4 Power P=I×V Penn ESE370 Fall2013 -- DeHon 4

5 Understanding Currents Penn ESE370 Fall2013 -- DeHon 5

6 Operating Modes Steady-State: What modes are the transistors in? –Vin=Vdd –Vin=Gnd What current flows in steady state? Penn ESE370 Fall2013 -- DeHon 6

7 Operating Modes Steady-State: Vin=Vdd –PMOS subthreshold –NMOS resistive Penn ESE370 Fall2013 -- DeHon 7

8 Static Power Where does I static come from? –Subthreshold leakage –Gate-Drain leakage Penn ESE370 Fall2013 -- DeHon 8 Vin~=V dd

9 Data Dependent? How does value of input impact I static ? Penn ESE370 Fall2013 -- DeHon 9

10 Data Dependent? How does value of input impact I static ? Penn ESE370 Fall2013 -- DeHon 10

11 Static Power P=I×V What V should we use? Penn ESE370 Fall2013 -- DeHon 11

12 Power: During Switching P=IV Input switch 1  0 What’s V? What’s I? Where does I go? Penn ESE370 Fall2013 -- DeHon 12

13 Power: During Switching P=IV Input switch 1  0 Where does I go? –Vin=Gnd Penn ESE370 Fall2013 -- DeHon 13

14 Power: During Switching P=IV Input switch 1  0 Where does I go? –Vin=Gnd Penn ESE370 Fall2013 -- DeHon 14

15 Power: During Switching P=IV Input switch 1  0 Where does I go? –Vin=Vdd/2 And Vdd>Vthn+|Vthp| Penn ESE370 Fall2013 -- DeHon 15

16 Power: During Switching P=IV Input switch 1  0 Where does I go? –Vin=Vdd/2 And Vdd>Vthn+|Vthp| Penn ESE370 Fall2013 -- DeHon 16

17 Switching Currents Charge (discharge) output If both transistor on: –Current path from V dd to Gnd Penn ESE370 Fall2013 -- DeHon 17

18 Power: During Switching P=IV Input switch 0  1 What’s V? What’s I? Where does current flow? Penn ESE370 Fall2013 -- DeHon 18

19 Power: During Switching P=IV Input switch 0  1 Where does I go? –Vin=Vdd Penn ESE370 Fall2013 -- DeHon 19

20 Power: During Switching P=IV Input switch 0  1 Where does I go? –Vin=Vdd Penn ESE370 Fall2013 -- DeHon 20

21 Power: During Switching P=IV Input switch 0  1 Where does I go? –Vin=Vdd/2 And Vdd>Vthn+|Vthp| Penn ESE370 Fall2013 -- DeHon 21

22 Power: During Switching P=IV Input switch 0  1 Where does I go? –Vin=Vdd/2 And Vdd>Vthn+|Vthp| Penn ESE370 Fall2013 -- DeHon 22

23 Observe I changes over time Data dependent At least two components –I static – no switch –I switch – when switch Penn ESE370 Fall2013 -- DeHon 23

24 Switching Penn ESE370 Fall2013 -- DeHon 24

25 Switching Currents I switch (t) = I sc (t) + I dyn (t) I(t) = I static (t)+I switch (t) Penn ESE370 Fall2013 -- DeHon 25 I sc I static I dyn

26 Charging I dyn (t) – why changing? –I ds = f(V ds,V gs ) –and V gs, V ds changing Penn ESE370 Fall2013 -- DeHon 26

27 Look at Energy [focus on I dyn (t)] Penn ESE370 Fall2013 -- DeHon 27

28 Energy to Switch Penn ESE370 Fall2013 -- DeHon 28

29 Integrating Do we know what this is? Penn ESE370 Fall2013 -- DeHon 29

30 Capacitor Charge Do we know what this is? What is Q? Penn ESE370 Fall2013 -- DeHon 30

31 Capacitor Charge Penn ESE370 Fall2013 -- DeHon 31

32 Capacitor Charging Energy Penn ESE370 Fall2013 -- DeHon 32

33 Class Ended Here Penn ESE370 Fall2013 -- DeHon 33

34 Switching Power Every time output switches 0  1 pay: –E = CV 2 P dyn = (# 0  1 trans) × CV 2 / time # 0  1 trans = ½ # of transitions P dyn = (# trans) × ½CV 2 / time Penn ESE370 Fall2013 -- DeHon 34

35 Data Dependent Activity Consider an 8b counter –How often do each of the following switch? Low bit? High bit? –Average switching across all 8 output bits? Assuming random inputs (no glitching) –Activity at output of nand4? –Activity at output of xor4? Penn ESE370 Fall2013 -- DeHon 35

36 Glitches Inputs Transition from 0 1 0  1 1 1 –What does output look like? Penn ESE370 Fall2013 -- DeHon 36

37 Charging Power P dyn = (# trans) × ½CV 2 / time Often like to think about switching frequency Useful to consider per clock cycle –Frequency f = 1/clock-period P dyn = (#trans/clock) ½CV 2 f Penn ESE370 Fall2013 -- DeHon 37

38 Charging Power P dyn = (#trans/clock) ½CV 2 f Let a = activity factor a = average #tran/clock P dyn = a½CV 2 f Penn ESE370 Fall2013 -- DeHon 38

39 Chip Level Implications Time Permitting Penn ESE370 Fall2013 -- DeHon 39

40 Billion Transistor Leakage 4 Billion transistors Say 1 Billion gates Each with one W=2 transistor leaking How much leakage current? Penn ESE370 Fall2013 -- DeHon 40

41 ITRS 2009 45nm Penn ESE370 Fall2013 -- DeHon 41 High Performance I sd,leak 100nA/  m I sd,sat 1200  A/  m C g,total 1fF/  m V th 285mV I leak0 = 0.045  m × I sd,leak

42 Leakage Power 4 Billion Transistor chip doing nothing Total Leakage? Leakage Power? Penn ESE370 Fall2013 -- DeHon 42

43 Reduce Leakage? P=VI How do we reduce leakage? Penn ESE370 Fall2013 -- DeHon 43

44 ITRS 2009 45nm Penn ESE370 Fall2013 -- DeHon 44 High Performance Low Power I sd,leak 100nA/  m50pA/  m I sd,sat 1200  A/  m560  A/  m C g,total 1fF/  m0.91fF/  m V th 285mV585mV I leak0 = 0.045  m × I sd,leak

45 Low Power Process 4 Billion Transistor chip doing nothing Total Leakage? Leakage Power? Penn ESE370 Fall2013 -- DeHon 45

46 ITRS 2009 45nm Penn ESE370 Fall2013 -- DeHon 46 High Performance Low Power I sd,leak 100nA/  m50pA/  m I sd,sat 1200  A/  m560  A/  m C g,total 1fF/  m0.91fF/  m V th 285mV585mV C 0 = 0.045  m × C g,total C 0 = 0.045 × 10 -15 F

47 Switching Power 4 Billion Transistors –Organized into 1 billion gates (e.g. nand2) C load = 22C 0 a=0.2 f=1GHz Power? Penn ESE370 Fall2013 -- DeHon 47

48 Switching Power V=1V C load =22C 0 ≈ 1 fF = 10 -15 F P=a(0.5×10 -15 )(N gate )f a=0.2 P=10 -16 (N gate )f Penn ESE370 Fall2013 -- DeHon 48

49 Dynamic vs. Static Power At what speed (f) does leakage power dominate switching power? Penn ESE370 Fall2013 -- DeHon 49

50 Compare W N = 2  I leak = 9×10 -9 A P=a(0.5×10 -15 ) f + 9×10 -9 W a=0.2 P=10 -16 ×f + 9×10 -9 W For what freqs does leakage power dominate switching power? Penn ESE370 Fall2013 -- DeHon 50

51 Ideas Three components of power –Static –Short-circuit –Charging P tot = P static + P sc + P dyn Penn ESE370 Fall2013 -- DeHon 51

52 Admin HW6 due Thursday Normal lecture Wednesday and Friday Penn ESE370 Fall2013 -- DeHon 52

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