1. Microprocessors The ia32 User Instruction Set Jan 31st, 2002

2. User Instruction Set This is the instructions that can be used by applications programs This is the instructions that can be used by applications programs Operating in protection ring 3 Operating in protection ring 3 The most restricted instruction set The most restricted instruction set

3. Addressing Addresses are specified by a Addresses are specified by a Segment number, where the segment dictates the starting address and length of the segment. Segment number, where the segment dictates the starting address and length of the segment. A 32-bit offset within the segment A 32-bit offset within the segment In user mode, a program cannot change what segments are allocated or accessible In user mode, a program cannot change what segments are allocated or accessible Segments can be marked read-only, or execute-only Segments can be marked read-only, or execute-only

4. Addressing, continued Usually, an program operates with DS and SS set to a standard data segment and CS set to a standard code segment Usually, an program operates with DS and SS set to a standard data segment and CS set to a standard code segment Segment registers are never modified or explicitly referenced Segment registers are never modified or explicitly referenced All addressing then behaves like a simple 32-bit linear address, where code addresses and data addresses are separate (cannot modify code) All addressing then behaves like a simple 32-bit linear address, where code addresses and data addresses are separate (cannot modify code)

5. Addressing, continued Addresses (offsets) are 32-bits and fit in a 32-bit register, segments are ignored, so we can think of these offsets as simply addresses. Addresses (offsets) are 32-bits and fit in a 32-bit register, segments are ignored, so we can think of these offsets as simply addresses. In remainder of these slides we will use that convention In remainder of these slides we will use that convention More on segmentation when we talk about the system level instruction set More on segmentation when we talk about the system level instruction set

6. Basic model of instructions Instructions tyipcally operate Instructions tyipcally operate Register to register Register to register Register to memory Register to memory Memory to register Memory to register But not memory to memory But not memory to memory There are some memory/memory instrucs There are some memory/memory instrucs

7. The MOV instruction Moves data Moves data From register to register From register to register From register to memory From register to memory From memory to register From memory to register It thus encompasses load and store It thus encompasses load and store The memory address if given allows the full set of addressing modes The memory address if given allows the full set of addressing modes

8. Addressing modes Direct memory (32-bit address in instruction) Direct memory (32-bit address in instruction) Simple indexing Simple indexing Indexing + offset (8 or 32 bits) Indexing + offset (8 or 32 bits) Double indexing Double indexing Double indexing + offset (8 or 32 bits) Double indexing + offset (8 or 32 bits) Double indexing with scaling Double indexing with scaling Double indexing with scaling and offset Double indexing with scaling and offset Scaling multiplies one index reg by 2,4,8 Scaling multiplies one index reg by 2,4,8

9. The ADD instruction ADD can operate ADD can operate reg1 := reg1 + reg2 reg1 := reg1 + reg2 mem := mem + reg2 mem := mem + reg2 reg1 := reg1 + mem reg1 := reg1 + mem Full range of addressing modes if mem Full range of addressing modes if mem Same instruction for signed/unsigned Same instruction for signed/unsigned Sets flags as a result Sets flags as a result Can be used on any of the 8 registers Can be used on any of the 8 registers

10. Flag Registers CF, set if carry out from MSB CF, set if carry out from MSB ZF, set if result is zero ZF, set if result is zero OF, set if signed overflow OF, set if signed overflow Carry in to sign /= Carry out of sign Carry in to sign /= Carry out of sign SF, set if result sign flag is 1 SF, set if result sign flag is 1 Other special purpose flags Other special purpose flags

11. Other arithmetic and logic SUB – subtract, like ADD SUB – subtract, like ADD ADC/SBB – input the CF at low order ADC/SBB – input the CF at low order Used for multiple precision Used for multiple precision OR, AND, XOR OR, AND, XOR CMP (like SUB but no result set) CMP (like SUB but no result set) Just flags Just flags TEST (like AND, but on result set) TEST (like AND, but on result set) Just flags Just flags

12. The flags after a CMP CMP is basically subtract CMP is basically subtract CF set if opnd2 > opnd1 unsigned CF set if opnd2 > opnd1 unsigned ZF set if operands equal ZF set if operands equal OF set if subtraction caused overflow OF set if subtraction caused overflow SF set if result sign bit is set SF set if result sign bit is set Combinations of these flags provide testing of the entire range of signed and unsigned comparison results Combinations of these flags provide testing of the entire range of signed and unsigned comparison results

13. An example of test after CMP Consider comparison of two signed values Consider comparison of two signed values If the subtraction does not overflow, then the result is negative if opnd2 > opnd1 If the subtraction does not overflow, then the result is negative if opnd2 > opnd1 But if the result overflow, the sign is wrong But if the result overflow, the sign is wrong Therefore condition for opnd2>opnd1 is Therefore condition for opnd2>opnd1 is SF xor OF SF xor OF

14. Full set of shifts Logical (shift in zero bits) Logical (shift in zero bits) Arithmetic (shift in sign bits) Arithmetic (shift in sign bits) Double shift (uses EAX/EDX) Double shift (uses EAX/EDX) Operand can be 1, or value in ECX Operand can be 1, or value in ECX Can shift register or memory Can shift register or memory

15. 8-Bit operands All arithmetic and logical operations can operate on the 8-bit registers AL,BL,CL,DL,AH,BH,CH,DH All arithmetic and logical operations can operate on the 8-bit registers AL,BL,CL,DL,AH,BH,CH,DH This is mostly for back compatibility but can be useful, e.g. for 8-bit arithmetic with carry/overflow detection This is mostly for back compatibility but can be useful, e.g. for 8-bit arithmetic with carry/overflow detection Instructions for sign/zero extending 8-bits to 32-bits (these are generally useful) Instructions for sign/zero extending 8-bits to 32-bits (these are generally useful)

16. 16-bit operands For further back compatibility, if a special 16-bit operand prefix precedes the instruction, then the instruction is interpreted in old 8086 style, and can operate on AX,BX,CX,DX,SP,BP,SI,DI For further back compatibility, if a special 16-bit operand prefix precedes the instruction, then the instruction is interpreted in old 8086 style, and can operate on AX,BX,CX,DX,SP,BP,SI,DI This is the low order 16-bits of each register This is the low order 16-bits of each register

17. Alignment Requirements Data does not have to be aligned, it can be on any byte boundary. Data does not have to be aligned, it can be on any byte boundary. But machine operates more efficiently if data is naturally aligned But machine operates more efficiently if data is naturally aligned E.g. 32-bit integer on four byte boundary E.g. 32-bit integer on four byte boundary Which means last 2 bits of address are 00 Which means last 2 bits of address are 00

18. Jump Instructions The unconditional jump instruction can jump anywhere in the 32-bit code segment (full 32-bit offset in instruction) The unconditional jump instruction can jump anywhere in the 32-bit code segment (full 32-bit offset in instruction) There is also a 7 byte jump instruction that includes a segment number There is also a 7 byte jump instruction that includes a segment number But we don’t often need to change code segments for a jump, so seldom used. But we don’t often need to change code segments for a jump, so seldom used.

19. Branch Instructions The conditional branch instructions allow an 8-bit offset (-128 to +127 bytes) The conditional branch instructions allow an 8-bit offset (-128 to +127 bytes) Can always combine with jump Can always combine with jump Instead of BNE target which is out of range Instead of BNE target which is out of range Use Use BE next JMP target next: BE next JMP target next: Assembler can take care of this Assembler can take care of this Idea is to keep branch instructions small Idea is to keep branch instructions small

20. Branch Conditions Full set of branch conditions Full set of branch conditions Direct test of flag Direct test of flag JO target – jumps if OF flag is set JO target – jumps if OF flag is set Combinations of flags for comparisons Combinations of flags for comparisons JL target – jumps if opnd1 < opnd2 signed JL target – jumps if opnd1 < opnd2 signed (corresponds to jump if OF xor SF) (corresponds to jump if OF xor SF) Full set of conditions for signed/unsigned Full set of conditions for signed/unsigned

21. Hardware Stack ESP is used as a hardware stack pointer ESP is used as a hardware stack pointer PUSH and POP instructions push data onto this stack, or POP data off, from/to register or memory PUSH and POP instructions push data onto this stack, or POP data off, from/to register or memory Used for temp storage, saving of registers and passing of parameters to procedures Used for temp storage, saving of registers and passing of parameters to procedures Stack builds down (PUSH decrements ESP) Stack builds down (PUSH decrements ESP)

22. CALL Instruction Most usual form is 5 bytes, opcode plus 32-bit offset into code segment. Most usual form is 5 bytes, opcode plus 32-bit offset into code segment. Return point automatically pushed onto stack Return point automatically pushed onto stack RET instruction returns via pushed return RET instruction returns via pushed return Can also give segment number for intersegment calling Can also give segment number for intersegment calling Can be used to call system routines (more on that when we discuss system instructions) Can be used to call system routines (more on that when we discuss system instructions)

23. The Calling Sequence Arguments are pushed on to stack Arguments are pushed on to stack Series of push instructions one for each arg Series of push instructions one for each arg Procedure establishes stack frame using Procedure establishes stack frame using PUSH EBP (save old frame pointer) PUSH EBP (save old frame pointer) MOV EBP,ESP (set new frame pointer) MOV EBP,ESP (set new frame pointer) SUB ESP, 44 (establish local frame) SUB ESP, 44 (establish local frame)

24. What a Stack Frame Looks Like High memory at top of slide  first pushed parameter …  last pushed parameter EBP  saved EBP (old frame pointer)  first variable … ESP  last local variable High memory at top of slide  first pushed parameter …  last pushed parameter EBP  saved EBP (old frame pointer)  first variable … ESP  last local variable Address params with positive offsets from EBP Address params with positive offsets from EBP Address locals with negative offsets from EBP Address locals with negative offsets from EBP

25. Returning from a Procedure Remove stack frame Remove stack frame MOV ESP,EBP MOV ESP,EBP Restore EBP Restore EBP POP EBP POP EBP Above two instructions can be given as a single instruction LEAVE Above two instructions can be given as a single instruction LEAVE Return Return RET if caller strips parameters RET if caller strips parameters RET 8 to strip 8 bytes after return RET 8 to strip 8 bytes after return

26. More on calling sequences STDCALL STDCALL This is the PASCAL calling sequence, parameters are pushed from left to right and the caller is expected to pop the parameters This is the PASCAL calling sequence, parameters are pushed from left to right and the caller is expected to pop the parameters C In the C calling sequence, parameters are pushed from right to left, and the caller does NOT pop the parameters (allows variable number of parameters). In the C calling sequence, parameters are pushed from right to left, and the caller does NOT pop the parameters (allows variable number of parameters).