1. 1 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) CPRE 583 Reconfigurable Computing Lecture 5: Wed 10/14/2009 (Reconfiguration Management) Instructor: Dr. Phillip Jones (phjones@iastate.edu) Reconfigurable Computing Laboratory Iowa State University Ames, Iowa, USA http://class.ee.iastate.edu/cpre583/

2. 2 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Class Projects Finish Chapter 2: Reconfigurable Computing Systems. Start Chapter 3: Reconfiguration Management Overview

3. 3 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Next Wednesday (10/21) –Group Formed –Topic – WebCT to help setup groups Next Friday (10/23) –5-6 slide presentation of project idea to class Topic High-level milestones High-level time line for completion Class Projects

4. 4 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Project Grading Breakdown 60% Final Project Demo 30% Final Project Report 10% Final Project Presentation

5. 5 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Expectations –Working system –Write up that can potentially be submitted to a conference Will use DAC format as write up guide line –15-20minute PowerPoint Presentation DAC (Design Automation Conference) –http://www.dac.com/46th/index.aspxhttp://www.dac.com/46th/index.aspx –Due Date: 5pm (MT) Monday 12/8/2008? –Cash Prizes Projects

6. 6 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) FPL FPT FCCM DAC ICCAD Reconfig RTSS RTAS Projects: Relevant conferences

7. 7 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Teams Formed and Idea: Wed 10/21 –Project idea in Power Point 3-5 slides Motivation (why is this interesting, useful) What will be the end result High-level picture of final product –Project team list: Name, Responsibility High-level Plan: Fri 10/23 (9pm) –Power Point 5-10 slides System block diagrams High-level algorithms (if any) Concerns –Implementation –Conceptual Projects: Target Timeline

8. 8 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Work on projects: 10/27 - 12/12 –Weekly update reports More information on updates will be given Presentations: Last Wed Fri of class –Present / Demo what is done at this point –15-20 minutes (depends on number of projects) Final write and HW turn in: Day of final (TBD) Projects: Target Timeline

9. 9 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Some basic configuration architectures Key issues when managing the reconfiguration of a system What you should learn

10. 10 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Reconfiguration Management Goal: –Minimize the overhead associated with run-time reconfiguration Why import to address –Can take 100’s of milliseconds to reconfigure a device –For high performance applications this can be a large overhead (i.e. decreases performance)

11. 11 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) High Level Configuration Setups CPU Configuration Request FSM ROM (bitfile) FPGA Config Data Config Control (CC) Externally trigger reconfiguration

12. 12 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) High Level Configuration Setups ROM (bitfile) FPGA Config Data CC FSM Self trigger reconfiguration

13. 13 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Configuration Architectures Single-context Multi-context Partially Reconfigurable –Relocation & Defragmentation –Pipeline Reconfiguration –Block Reconfigurable

14. 14 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Single-context Config clk Config I/F Config enable Config Data INOUT CLK EN INOUT CLK EN INOUT CLK EN FPGA

15. 15 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Multi-context Config clk Context switch OUT CLK EN INOUT CLK EN IN 1 2 3 Config Data Config Enable 1 2 3 Config Data Config Enable Context 1 Enable Context 2 Enable Context 3 Enable FPGA

16. 16 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable Reduce amount of configuration to send to device. Thus decreasing reconfiguration overhead Need addressable configuration memory, as opposed to single context daisy chain shifting Example Encryption –Change key –And logic dependent on key PR devices –AT40K –Xilinx Virtex series (and Spartan, but not a run time) Need to make sure partial config do not overlap in space/time (typical a config needs to be placed in a specific location, not as homogenous as you would think in terms of resources, and timing delays)

17. 17 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable

18. 18 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable Full Reconfig 10-100’s ms

19. 19 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable Partial Reconfig 100’s us - 1’s ms

20. 20 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable Partial Reconfig 100’s us - 1’s ms

21. 21 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable Partial Reconfig 100’s us - 1’s ms

22. 22 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable Partial Reconfig 100’s us - 1’s ms

23. 23 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Partially Reconfigurable Partial Reconfig 100’s us - 1’s ms Typically a partial configuration modules map to a specific physical location

24. 24 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Relocation and Defragmentation Make configuration architectures support relocatable modules Example of defragmentation text good example (defrag or swap out, 90% decrease in reconfig time compared to full single context) –Best fit, first fit, … Limiting factor –Routing/logic is heterogeneous timing issues, need modified routes Special resources needed (e.g. hard mult, BRAMS) Easy issue if there are blocks of homogeneity –Connection to external I/O (fix IP cores, board restrict) Virtualized I/O (fixed pin with multiple internal I/Fs? –2D architecture more difficult to deal with Summary of feature PR arch should have –Homogenous logic and routing layout –Bus based communication (e.g. network on chip) –1D organization for relocation

25. 25 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Relocation and Defragmentation A B C

26. 26 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Relocation and Defragmentation D C

27. 27 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Relocation and Defragmentation D C A

28. 28 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Relocation and Defragmentation D C

29. 29 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Relocation and Defragmentation D C A

30. 30 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Relocation and Defragmentation D C A E F More efficient use of Configuration Space

31. 31 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Pipeline Reconfigurable Example: PipeRench –Simplifies reconfiguration –Limit what can be implemented PE 0 Cycle Virtual Pipeline stage 1 2 3 4 5 6 0123401234 0 1 0 1 2 1 2 3 2 3 4 0 3 4 0 Cycle Physical Pipeline stage 1 2 3 4 5 6 012012 0 1 0 1 2 3 1 2 3 4 2 3 4 0

32. 32 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Block Reconfigurable Swappable Logic Units Abstraction layer over a general PR architecture: SCORE Config Data

33. 33 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Managing the Reconfiguration Process Choosing a configuration When to load Where to load Reduce how often one needs to reconfigure, hiding latency

34. 34 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Configuration Grouping What to pack Pack multiple related in time configs into one –Simulated annealing, clustering based on app control flow

35. 35 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Configuration Caching When to load LRU, credit based dealing with variable sized configs

36. 36 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Configuration Scheduling Prefetching Control flow graph –Static compiler inserted conf instructions –Dynamic: probabilistic approaches MM (branch prediction) Constraints –Resource –Real-time Mitigation –System status and prediction What are current request Predict which config combination will give best speed up

37. 37 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Software-based Relocation Defragmentation Placing R/D decision on CPU host not on chip config controller

38. 38 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Context Switching Safe state then start where left off.

39. 39 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Slides in Progress Need to revise this lecture with figures, and useful animations Add some non-FPGA systems, maybe not since GARP, and PipeRench were discussed in last lecture. Perhaps just mention again –Main reason other archs are not used is economy of scales. Lots of FPGAs are manufacture, thus lowing cost and enable the use of state of the art fab technology (given high performance

40. 40 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Reducing Configuration Transfer Time Arch approach –Partial reconfiguration Compression

41. 41 - CPRE 583 (Reconfigurable Computing): Reconfiguration Management Iowa State University (Ames) Configuration Security Arch approach –Partial reconfiguration Compression