1. 1 TRANSISTOR AMPLIFIER CONFIGURATION -BJT Common-Emitter Amplifier- By: Syahrul Ashikin Azmi School of Electrical System Engineering

2. 2 Objectives To understand and familiar with dc analysis of bipolar transistor circuits. To study common-emitter amplifier in term of ac analysis and familiar with general characteristic of this circuit.

3. 3 Introduction 3 basic single-transistor amplifier configuration that can be formed are: Common-emitter (C-E configuration) Common collector / emitter follower (C-C configuration) Common base (C-B configuration) Each configuration has its own advantages in form of: Input impedance Output impedance Current / voltage amplification

4. 4 Basic common-emitter circuit Voltage divider biasing -> set Q-point Coupling capacitor -> dc isolation between amplifier and signal source Emitter at ground -> common emitter Dc voltage -> power the amplifier

5. 5 Rules in dc analysis Replacing all capacitors by open circuit. Replacing all inductors by short circuit. Replacing ac voltage source by short circuit or ground connection. Replacing ac current source by open circuit.

6. 6 1 st : Perform DC analysis The circuit can be analyzed by forming a Thevenin equivalent circuit. C C acts as an open circuit to dc.

7. 7 Thevenin circuit analysis We know that, Thevenin resistance, R TH is: Thevenin voltage, V TH is: Apply KVL around B-E loop; The collector current, I CQ is then:

8. 8 Cont. Thevenin circuit analysis Apply KVL to collector-emitter loop; Thus, Q-point of the amplifier circuit is the coordinate between I CQ and V CEQ.

9. 9 Rules in ac analysis Replacing all capacitors by short circuits Replacing all inductors by open circuits Replacing dc voltage sources by ground connections Replacing dc current sources by open circuits

10. 10 2 nd : Perform AC analysis -small-signal equivalent circuit- Inside the transistor

11. 11 Small-signal hybrid- π parameters Small-signal input resistance, r π Transconductance, g m Small-signal output resistance, r o Control voltage, V π Output voltage, V o Input resistance, R i

12. 12 Small-signal hybrid- π parameters Output resistance, R o Voltage gain, A v

13. 13 Example 1 Given V CC =12V,R S =0.5kΩ, R 1 =93.7kΩ, R 2 =6.3kΩ, R C =6kΩ, β=100, V BE(on) =0.7V and V A =100V. Determine small-signal voltage gain, input resistance and output resistance of the circuit.

14. 14 Solution Example 1 1 st step: DC solution Find Q-point values. ICQ = 0.95mA VCEQ=6.31V.

15. 15 Cont Solution Example 1 2 nd step: AC solution Small-signal hybrid-π parameters are:

16. 16 Cont Solution Example 1 Small-signal voltage gain is: Input resistance, Ri is:

17. 17 Cont Solution Example 1 O/p resistance, R o -> by setting independent source V s = 0 -->no excitation to input portion, V π =0, so g m V π =0 (open cct).

18. 18 Common-emitter circuit with emitter resistor Why we need to add emitter resistor, R E in the circuit design? Without R E, when β increases or decreases -> I CQ and V CEQ also vary, thus Q-point will be shifted and makes the circuit unstable. By adding R E, there will be not much shift in Q- point is stabilized even with variation of β. Moreover, the voltage gain is less dependent on transistor current gain in ac analysis.

19. 19 Common-emitter circuit with emitter resistor Emitter resistor

20. 20 Thevenin circuit analysis Apply KVL around B-E loop,

21. 21 Thevenin circuit analysis We will get collector current as: Apply KVL around C-E loop to find V CEQ,

22. 22 Ac analysis -small-signal equivalent circuit-

23. 23 Small-signal hybrid-π parameters The ac output voltage is: (if we consider equivalent circuit with current gain β) Input voltage equation: Input resistance looking into the base of BJT, Rib: Input resistance to the amplifier is:

24. 24 Small-signal hybrid-π parameters By voltage divider, we get relate Vin and Vs: Small-signal voltage gain is then: If R i >>R S and if (1+β)R E >> r π, voltage gain is: Exact value Approximate value

25. 25 Example 2 Given V CC =10V, R 1 =56kΩ, R 2 =12.2kΩ, R C =2kΩ, R E =0.4kΩ, RS=0.5kΩ, V BE(on) =0.7V, β=100 and V A = ∞. a) Sketch Thevenin equivalent circuit. b) Determine Q-points. c) Sketch and label small-signal equivalent hybrid-π circuit. d) Find small-signal voltage gain, A V.

26. 26 Common-emitter circuit with positive and negative voltage biasing Biasing with dual supplies in desirable in some applications because: Eliminate coupling capacitor Allow dc input voltages as input signals.

27. 27 Example 3 A simple transistor circuit biased with both +ve and –ve dc voltages is shown in figure below. Given β=100 and V BE(on) =0.7V. Calculate I EQ, I CQ and V CEQ.

28. 28 Solution Example 3 For dc analysis, set v s =0 so that base terminal is at ground potential. KVL around B-E loop, So, emitter current: Collector current:

29. 29 Cont solution example 3 Apply KVL around C-E loop yields Rearrange the equation to find VCEQ;

30. 30 Example 4 Let β=120, R1=175kΩ, R2=250kΩ, RC=10kΩ, RE=20kΩ and VBE(on)=0.7V. For the given circuit, i) Find RTH, VTH and Q-points. ii) Sketch dc load line

31. 31 Solution Example 4 1 st : Sketch Thevenin equivalent circuit to find R TH and V TH. R TH = 103kΩ & V TH = 1.6V 2 nd : Apply KVL around B-E loop to find equation for I BQ. Then, find I CQ and I EQ. IBQ = 3.92μA ICQ = 0.471mA & IEQ = 0.474mA 3 rd : Apply KVL around C-E loop to find equation for V CEQ. V CEQ = 3.8V 4 th : Sketch dc load line and indicate the Q- points. Find I C(max) at y-axis and V CE(cutoff) = V CC =V + -V - =18V at x-axis.

32. 32 Common-emitter circuit with emitter resistor, R E The basic common-emitter used in previous analysis cause a serious problem when: If BJT with VBE=0.7V is used, we get IB=9.5μA and IC=0.95mA but.. If a new BJT with VBE=0.6V is used, IB=26μA will make transistor goes into saturation  not practical. Improved design  include an emitter resistor.

33. 33 Cont.. Q-point is stabilized against variation of β if emitter resistor included in cct. (in dc biasing design) For ac signal, voltage gain with R E is less dependent on current gain, β. Eventhough emitter is not ground potential, cct still referred as a common-emitter cct.

34. 34 Cont.. Assume: Cc -> short circuit Early voltage -> ∞, o/p resistance r o is neglected (open cct).

35. 35 Cont.. The ac output voltage is: (if we consider equivalent circuit with current gain β) Input voltage equation: Input resistance looking into the base of BJT, Rib: Input resistance to the amplifier is: Resistance reflection rule

36. 36 Cont.. By voltage divider, we get relate Vin and Vs: Small-signal voltage gain is then: If R i >>R S and if (1+β)R E >> r π, voltage gain is:

37. 37 Example 5 Determine the small-signal voltage gain and input resistance of C-E circuit with an emitter resistor. β=100, VBE(on)=0.7V and VA=∞.

38. 38 Cont Example 5 Small-signal equivalent circuit of C-E with RE

39. 39 C-E Amplifier with Emitter Bypass Capacitor C E provides a short circuit to ground for the ac signals

40. 40 Cont.. By include RE, it provide stability of Q-point. If RE is too high +++> small-signal voltage gain will be reduced severely. (see Av equation) Thus, RE is split to RE1 & RE2 and the second resistor is bypassed with “emitter bypass capacitor”. C E provides a short circuit to ground for ac signal. So, only RE1 is a part of ac equivalent circuit. For dc stability: RE=RE1+RE2 For ac gain stability: RE=RE1 since C E will short RE2 to ground.

41. 41 Example 6 Given β=100, V BE =0.7V and V A =100V. Determine: (a) small- signal voltage gain (b) input resistance seen by the signal source, R in and the output resistance looking back into the output terminal, R o.

42. 42 AC Load Line Analysis Dc load line -> a way of visualizing r/ship between Q-point and transistor characteristic. When capacitor included in cct, a new effective load line  ac load line exist. Ac load line -> visualizing r/ship between small- signal response and transistor characteristic. Ac operating region is on ac load line.

43. 43 Ac load line cont..

44. 44 Ac load line cont.. For Dc load line: Apply KVL around collector-emitter loop, But Substitute and rearrange both equations: If β>>1, then we can approximate Dc load line equation

45. 45 Cont.. For ac analysis, apply KVL around collector-emitter loop, Assume ic ≈ ie, The slope is given by: The slope of ac load differ from dc load line  RE2 is not included in the equivalent circuit. Small-signal C-E voltage and collector current response are functions of resistor RC and RE1.

46. 46 Dc and ac load lines for CE circuit

47. 47 + V CE 0 + I C I CQ V CEQ Q AC load line cont..

48. 48 Maximum symmetrical swing When symmetrical sinusoidal signal applied to i/p of amplifier, symmetrical sinusoidal signal generated at o/p. Use ac load line to determine the maximum output symmetrical swing. If output exceed limit, a portion of o/p signal will be clipped and signal distortion occur.

49. 49 1. draw the ac load line ICIC V CE ac load line 0 2. add the Q point Q 3. add i b ~ v in 4. add reference lines 5. sketch i c 6. sketch v ce

50. 50 Saturation & Cut- Off Regions RESTRICT MAXIMUM UNDISTORTED SIGNAL

51. 51 Maximum undistorted signal

52. 52 Bias (I CQ ) Below Load Line Centre ICIC ac load line 0 Q V CE I Cmax I CQ V CEQ

53. 53 Bias (I CQ ) Above Load Line Centre ICIC ac load line 0 Q V CE I CQ V CEQ I Cmax

54. 54 ICIC ac load line 0 Q V CE I CQ Saturation Distortion

55. 55 Cut-Off Distortion ICIC ac load line 0 Q V CE I CQ

56. 56 ICIC ac load line 0 V CE I CQ Q Clipping