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4-Bit Universal Shift Register Behavioral Vs. Structural Description Behavioral Description – Behavior model of a shift register Describe the operation.

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Presentation on theme: "4-Bit Universal Shift Register Behavioral Vs. Structural Description Behavioral Description – Behavior model of a shift register Describe the operation."— Presentation transcript:

1

2 4-Bit Universal Shift Register

3 Behavioral Vs. Structural Description Behavioral Description – Behavior model of a shift register Describe the operation of the register without a preconceived structure. – Random number generator Binary values of msb_in, lsb_in, i_par Structural Description – Models the circuits in terms of a collection of components such as gates, flip-flops…

4 Behavioral Model of Shift Regsiter

5 Test Bench 1. Generate random number With matlab 2.Read random number at the neg edge of the clock

6 [s1,s0=[1,1], Load i_par=0111 a_par=0111

7 [s1,s0]=[0,0], No Change i_par=0111 a_par=0011

8 [s1,s0]=[1,0], Shift Left

9 [s1,s0]=[0,1], Shift Right

10 4-Bit Universal Shift Register clr clk select Q i0 i1 i2 i3

11 Waveform LoadNo Change Shift Right Shift Left

12 4-bit Universal Shift Register

13 Verilog Code of Each Stage

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