1. Kirk Scott Computer Science The University of Alaska Anchorage 1

2.  These overheads fall into 3 sections:  1. An explanation of MISC in general  2. Modifications to MISC  3. What is the Point of This? 2

3. 3

4.  MISC is a Java simulation of a simple CPU  The simulation includes a simple machine language  Machine programs can be written in this language 4

5.  MISC contains a simple operating system  The operating system functions are written in Java as part of the simulation  In MISC, absolute machine code is loaded at memory address 0 and executed there  Program loading and execution in MISC can be modified in several ways 5

6.  Bytes and registers  Bytes, words, and memory  General remarks on machine instruction execution  Fetch, decode, and execute  The machine language instruction set 6

7.  General remarks on the form of machine language  An example program  The Java methods comprising the simulation  The command line interface  A summary of the structure of the Java simulation by class, constructor, and method 7

8.  The MISC architecture makes use of 4 byte words  The contents of a register are modeled by an object containing a character array of 8 bytes 8

9.  Each bit is modeled by the presence of the character ‘1’ or the character ‘0’ in a position in an 8 byte array  The registers are packaged together in an array named “reg”  The index of the array identifies the particular register 9

10.  Registers:  register namedecimal indexbinary code  identificationin reg arrayof index   unusedreg[0]"00000000"   general purpose   Areg[1]"00000001"  Breg[2]"00000010"  Creg[3]"00000011"  Dreg[4]"00000100"  10

11.  Registers, cont’d.:  register namedecimal indexbinary code  identificationin reg arrayof index  memory offsets   codeoffsetreg[5]"00000101"  dataoffsetreg[6]"00000110"  unused1reg[7]"00000111"  unused2reg[8]"00001000"  unused3reg[9]"00001001"   flagreg[10]"00001010"  11

12.  Registers, cont’d.:  register namedecimal indexbinary code  identificationin reg arrayof index  control unit registers   instructionreg[11]"00001011"  operand1reg[12]"00001100"  operand2reg[13]"00001101"  extrareg[14]"00001110"   ALU registers   aluinreg1reg[15]"00001111"  aluinreg2reg[16]"00010000"  aluoutregreg[17]"00010001" 12

13.  A word in MISC consists of 4 bytes  Memory is implemented as an array of words  The index of the array is the word offset into memory   Memory:array name  memory[] 13

14.  These are the general rules for move and arithmetic instructions ◦ A register or a memory variable can be a destination ◦ A constant, a register, or a memory variable can be a source ◦ Memory to memory operations are not allowed 14

15.  A program is loaded to memory location 0 by default  The machine takes control of execution  The machine steps through the program code until it encounters an empty (“00000000”) instruction byte 15

16.  Execution starts with the value 0 in the code offset register  The next 4 contiguous bytes of code memory are put into the instruction, operand1, operand2, and extra registers  After the retrieval of each instruction the code offset is incremented for the next retrieval 16

17.  The MOVE Instruction  assembly instructionmethod in simulationmachine instruction  MOVE register, registervoid moveDestRegSrcReg()“10000001”  MOVE memory, registervoid moveToMemFromReg()“10000010”  MOVE register, memoryvoid movetoregfrommem()“10000011”  MOVE memory, constantvoid movetomemfromconst()“10000100”  MOVE register, constantvoid movetoregfromconst()“10000101” 17

18.  The ADD Instruction  assembly instructionmethod in simulationmachine instruction  ADD register, registervoid addDestRegSrcReg()“10000110”  ADD memory, registervoid addToMemFromReg()“10000111”  ADD register, memoryvoid addToRegFromMem()“10001000”  ADD memory, constantvoid addToMemFromConst()“10001001”  ADD register, constantvoid addToRegFromConst()“10001010” 18

19.  The SUB Instruction  assembly instructionmethod in simulationmachine instruction  SUB register, registervoid subDestRegSrcReg()“10001011”  SUB memory, registervoid subFromMemSrcReg()“10001100”  SUB register, memoryvoid subFromRegSrcMem()“10001101”  SUB memory, constantvoid subFromMemSrcConst()“10001110”  SUB register, constantvoid subFromRegSrcConst()“10001111” 19

20.  The JUMP Instruction  assembly instructionmethod in simulationmachine instruction  JMP unsigned integervoid jumpUnconditional()“10010000”  JPOS unsigned integervoid jumpOnPositive()“10010001”  JNEG unsigned integervoid jumpOnNegative()“10010010”  JZERO unsigned integervoid jumpOnZero()“10010011”  JOVER unsigned integervoid jumpOnOverflow()“10010100” 20

21.  The data declarations come first, then the program code  The program will be loaded at offset 0  Words 0-7 are reserved for data variables and will be filled with 0’s if there are not that many variables  No program, including data, can be longer than 31 lines  The source file signals termination with a row of asterisks 21

22.  Data Declaration Line  Byte 1: value  Bytes 2-4: unused  Line of Code  Byte 1: instruction  Byte 2: operand 1  Byte 3: operand 2  Byte 4: unused 22

23.  The example is a machine language program that sums the first 10 integers  The machine language alone with artificial line breaks and segment labels follows  The *’s are used on input to detect the end of the program. 23

24.  data segment   00001011000000000000000000000000  00000000000000000000000000000000 24

25.  code segment   10000101000001000000000100000000  10000111000000010000010000000000  10001010000001000000000100000000  10000011000000110000000000000000  10001011000000110000010000000000  10010001000010010000000000000000  ******************************** 25

26.  /.DATA///  00001011 00000000 00000000 00000000  /LOOPLIM/X0B//  loop limit offset 0, value 11   00000000 00000000 00000000 00000000  /ACCUM/X00//  accumulator offset 1, value 0 26

27.  /.CODE///  10000101 00000100 00000001 00000000  /MOVE/D/X01/  move reg D, const 1  movetoregfromconst 4, 1   /.LABEL/LOOPTOP//   10000111 00000001 00000100 00000000  /ADD/ACCUM/D/  (LABEL) add data offset 1, reg D  addtomemfromreg 1, 4 27

28.  10001010 00000100 00000001 00000000  /ADD/D/X01/  add reg D, 1  addtoregfromconst 4, 1   10000011 00000011 00000000 00000000  /MOVE/C/LOOPLIM/  move reg C, data offset 0  movetoregfrommem 3, 0 28

29.  10001011 00000011 00000100 00000000  /SUB/C/D/  sub reg C, reg D  subtractdestregsrcreg 3, 4  10010001 00001001 00000000 00000000  /JPOS/LOOPTOP//  Since space is reserved for 8 variables, the first instruction comes at word 8.  jump on positive to “LABEL”  jumponpositive 9   ******** ******** ******** ********  /.END/// 29

30.  The simulation consists of 4 java files: ◦ MachineWord.java ◦ Machine.java ◦ Osystem.java ◦ MachineOSProgram.java  MachineOSProgram contains main() 30

31.  MISC presents these 3 command prompts:  rpf (run program file)  dmc (dump memory contents)  exit 31

32.  rpf = run program file  This prompts the user for the machine language program to run  Machine language programs should be text files 32

33.  dmc = dump machine contents  This prompts the user for the name of the output file to create  This should be a text file  MISC has no I/O capabilities  You know what a program did by looking at the dmc file 33

34.  exit = quit the simulation 34

35.  MachineByte.java  MachineWord.java  Machine.java  This is the heart of the simulation  It contains these critical methods: ◦ totalReset() ◦ resetOffsets() ◦ takeControl() 35

36.  Osystem.java  This has a constructor in which a copy of the Machine is constructed  It contains these critical methods: ◦ runProgramFile() ◦ dumpMemoryContents() 36

37.  MachineOSProgram.java  This contains the main() method  It is the simulation driver  In it a copy of the Osystem is constructed  It loops, checking for user input from the command prompt 37

38.  MyTerminalIO  This presents the command prompt in a graphical user interface 38

39.  MISC can be modified to illustrate these operating system concepts: ◦ Memory allocation ◦ Absolute code ◦ Relative code ◦ Concurrency and scheduling 39

40.  By default, programs in MISC are loaded and executed at address 0 in memory  The following overhead shows a dmc file after running the example program 40

41.  memory contents  00001011000000000000000000000000  00110111000000000000000000000000  00000000000000000000000000000000  10000101000001000000000100000000  10000111000000010000010000000000  10001010000001000000000100000000  10000011000000110000000000000000  10001011000000110000010000000000  10010001000010010000000000000000  00000000000000000000000000000000  … 41

42.  Here are three possible modifications to MISC:  1. Load machine programs at addresses other than 0 ◦ Modify relative code to absolute code for a non- zero address  2. Load machine programs at addresses other than 0 with dynamic address checking ◦ Load relative code and modify the simulation to check memory accesses 42

43.  3. Load and run more than one machine program at a time ◦ This builds on modification 2 ◦ Memory accesses for each loaded program have to be correctly handled ◦ Execution of multiple programs also involves scheduling 43

44.  Support program loading at an address other than 0  Alter the machine program code at load time  Memory address references are changed to correspond with the load address  The loaded program is absolute code for the new address  The following overhead shows a dmc file after running the example program with these modifications 44

45.  memory contents  00000000000000000000000000000000  …  00001011000000000000000000000000  00110111000000000000000000000000  00000000000000000000000000000000  10000101000001000000000100000000  10000111001000010000010000000000  10001010000001000000000100000000  10000011000000110010000000000000  10001011000000110000010000000000  10010001001010010000000000000000  00000000000000000000000000000000  … 45

46.  Support program loading at an address other than 0  Do not alter the machine program code at load time  A machine language program is loaded to an address other than 0  The machine code is relative code 46

47.  Each time the running machine program wants to do a memory access, it returns the relative address in the machine code to the operating system  The operating system checks to see if it’s within range 47

48.  The operating system adds the memory access to the base address where the program was loaded  The operating system passes this absolute address back to the machine for program memory access  The following overhead shows a dmc file after running the example program with these modifications  It looks no different from the previous modification 48

49.  memory contents  00000000000000000000000000000000  …  00001011000000000000000000000000  00110111000000000000000000000000  00000000000000000000000000000000  10000101000001000000000100000000  10000111001000010000010000000000  10001010000001000000000100000000  10000011000000110010000000000000  10001011000000110000010000000000  10010001001010010000000000000000  00000000000000000000000000000000  … 49

50.  Modify MISC to load and run more than one machine language program concurrently  Round robin scheduling can be implemented  Instead of time-slicing, use instruction counts  Switch between from one machine program to another when it has executed a fixed number of instructions  Note that threading of command prompt input is necessary to accomplish this 50

51.  The following overhead shows a dmc file taken midstream while two copies of the machine language program are running  It illustrates that concurrency is taking place  Look at the second data variable, the accumulator  Both programs have non-zero totals  Neither program has yet reached the final value of 00110111 51

52.  memory contents  00001011000000000000000000000000  00011100000000000000000000000000  00000000000000000000000000000000  10000101000001000000000100000000  10000111000000010000010000000000  10001010000001000000000100000000  10000011000000110000000000000000  10001011000000110000010000000000  10010001000010010000000000000000  00000000000000000000000000000000  …  00000000000000000000000000000000  00001011000000000000000000000000  00001010000000000000000000000000  00000000000000000000000000000000  10000101000001000000000100000000  10000111000000010000010000000000  10001010000001000000000100000000  10000011000000110000000000000000  10001011000000110000010000000000  10010001000010010000000000000000  00000000000000000000000000000000  … 52

53.  MISC and the modifications given are used as part of a course on operating systems  Students are given the original version of MISC and do the modifications as assignments  Because MISC is written in Java, the students program their solutions by writing Java code  Students can work on operating system concepts without having to work with kernel code of a live operating system 53

54.  MISC as is, or expanded and modified, could be used in other areas of computer science ◦ Machine language coding ◦ Other operating system concepts ◦ Language translation ◦ Machine level operating system implementation ◦ Security exercises 54

55.  MISC could also be modified for additional purposes  Its machine language could be expanded  It could then be used as a testbed for machine language coding 55

56.  MISC could be extended to cover other operating system concepts  For example, different scheduling algorithms could be implemented 56

57.  MISC and its machine language could be used as part of an exercise in language translation  It would be possible to write an assembler for MISC  It would be possible to define a simple high- level language for MISC and write a compiler for it 57

58.  The MISC machine language could be extended  It could include memory operations  It could include all operations needed in order to support operating system functionality 58

59.  If this were done, a big conceptual jump would be possible  The operating system of MISC would not be Java code, Osystem  A complete operating system in MISC machine language could be written  Running the MISC simulation would consist of loading and running this machine language program 59

60.  If the previous step were taken, MISC would closely resemble a real operating system environment  It would then become possible to write malware for that environment  For example, it would become possible to write code which caused buffer overflows in the MISC operating system 60

61.  The overall idea is this:  A basic version of MISC exists  The three basic modifications have been developed  MISC has potential for further development in other areas 61

62. 62