1. FDR of the End-cap Muon Trigger Electronics 1/Mar./04 1 Hi-pT Board Hi-pT ASIC Board Type Endcap-wire Endcap-Strip Forward Chikara Fukunaga (TMU)

2. FDR of the End-cap Muon Trigger Electronics 1/Mar./04 2 Hi-pT ASIC Coincidence of triplet and doublet data for low p T  on candidates found in SLB ASICs for either wire or strip signals Selection of 2 highest p T (>20 GeV/c) tracks from maximum 6 low p T (> 6 GeV/c) tracks If no candidate is found, position (r or  ) and displacement (  r or  ) data are simply bypassed. Output data (10bits/track x 2) are serialised and formatted with so-called G-link compatible format. No readout facility

3. FDR of the End-cap Muon Trigger Electronics 1/Mar./04 3 Input Configuration of Hi-pT ASIC TripletDoublet WireStripWire & Strip Max. hits/SLB ASIC342 Max. number of SLB ASICs433 Max. number of hits input12 6

4. FDR of the End-cap Muon Trigger Electronics 1/Mar./04 4 Board Connection Diagram for endcap 1/24 and forward 1/48 (Trigger sector)

5. FDR of the End-cap Muon Trigger Electronics 1/Mar./04 5 Three types of Hi-pT Board Endcap-wire Endcap-strip Forward VME A24D16 operation

6. FDR of the End-cap Muon Trigger Electronics 1/Mar./04 6 Prototype Version 1 since June 2001 Forward Type Board Hi-pT ASIC version 3 (Jan./2001 to Feb./2001) (almost identical as production one) For final version, we will change Xilinx FPGA XC95288 to Actel SX-A LVDS deserialiser DS92LV1224 to SN65LVDS1224 Hi-pT ASIC Hitachi GA FPGA for VME control

7. FDR of the End-cap Muon Trigger Electronics 1/Mar./04 7 Schedule Hi-pT ASIC production version has been all delivered in 2002. Completed. ~100 (96) boards for Endcap wire ~100 (96) boards for Endcap strip ~50 (48) boards for Forward The boards are used only for trigger purpose. Installed in the Hi-pT crate which is put in the outer rim of M1(triplet) We don’t yet, therefore, fix the detailed schedule of board production.