1. Gate-Level Minimization Gate-Level Minimization

2. Outline 3.1 Introduction 3.2 The map method 3.3 Four-variable map 3.4 Five-variable map 3.5 Product of sums simplification 3.6 Don’t care conditions 3.7 NAND and NOR implementation 3.8 Other two-level implementation 3.9 Exclusive – OR function

3. The map method

4. Two-Variable Map A

5. Three-Variable Map

6. Example 3.1

7. Three-Variable Map

8. Example 3.2

9. Three-Variable Map

10. Example 3.3 F(x,y,z) = Σ (0,2,4,5,6)=z'+ xy'

11. Example 3.4

12. Four-Variable Map

13. Example 3.5

14. Example 3.6

15. Systematic Simplification

16. Example of Prime Implicants

19. Prime Implicants Selection Rule

20. Selection Rule Example

21. Simplification Using Prime Implicants

22. Five-Variable Map

23. Example 3.7F F= Σ (0,2,4,6,9,13,21,23,25,29,31)=A'B'E'+BD'E+ACE

24. Another Map for Example 3.7

25. Relationship between # of Adjacent Squares and # of the Literals

26. Product of Sums Simplification

27. Example 3.8

28. Implementation of Example 3.8

29. Truth Table of Function F

31. Don't-Care Conditions

32. Example 3.9

33. NAND Implementation

34. Two-level Implementation

35. Example 3.10

36. General Design Procedure

37. Multilevel NAND Circuits

39. NOR Implementation

40. Two-level Implementation

41. Multilevel NOR Circuits

42. Other Two-level Implementations

43. Nondegenerate Forms

44. AND-OR-Invert Implementation

45. OR-AND-Inverter Implementation

46. Tabular Summary

47. Example 3.11

49. Exclusive-OR Function

51. Odd and Even Functions

52. Logic Diagram of Odd and Even Functions

53. Four-Variable Exclusive-OR Function

54. Parity Generation and Checking

56. Conclusions

57. The End