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Real-Time DSP MCSPU Controller. Hardware Bittware “Hammerhead” SHARC board (1) Bittware “Reef” boards (with FPGA) (2) General Standards ADADIO (2) General.

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Presentation on theme: "Real-Time DSP MCSPU Controller. Hardware Bittware “Hammerhead” SHARC board (1) Bittware “Reef” boards (with FPGA) (2) General Standards ADADIO (2) General."— Presentation transcript:

1 Real-Time DSP MCSPU Controller

2 Hardware Bittware “Hammerhead” SHARC board (1) Bittware “Reef” boards (with FPGA) (2) General Standards ADADIO (2) General Standards 16AI64 (2) Symmetricom BC635 time processor (1) SBS CT9 CompactPCI system board (1)

3 Software CentOS 4.3 Linux Bittware DSP21K Toolkit Bittware/Jungo Linux device driver Analog Devices VisualDSP++ IDE/Toolkit Linux DSP Interface Library DSP controller binaries

4 DSP Layout

5 DSP per Axis View

6 RT Loop Keyed on 4kHZ FPGA interrupt Encoders from FPGA to “Mother” Main axis encoders from ADADIO via PLX9080 bridge Time from GPS Interpolator interrupt Servo interrupt Telemetry

7 Linux Interface Bittware driver 8.00.0 on mountain, 8.10.0 pending Bittware HIL primitives used for LBT DSP library libdsp.so from MCS control program “Mother” is main DSP per-axis read() and write() with SPCI or DMA

8 Linux Interface cont… Serialization in Linux Access is asynchronous to/from DSP Not deterministic and not realtime

9 Telemetry DMA into physical Linux pages Linux headers uses DSP headers Telemetry written from DSP to Linux (~4x faster) Interrupt thread disposes of telemetry data

10 DSP Debugging diag21k and DSP load map VisualDSP++ simulator Telemetry in /mnt/nfs, archive in /mnt/nfs- archive


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