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The LBDS trigger and re-trigger schemes Technical Review on UPS power distribution of the LHC Beam Dumping System (LBDS) A. Antoine.

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Presentation on theme: "The LBDS trigger and re-trigger schemes Technical Review on UPS power distribution of the LHC Beam Dumping System (LBDS) A. Antoine."— Presentation transcript:

1 The LBDS trigger and re-trigger schemes Technical Review on UPS power distribution of the LHC Beam Dumping System (LBDS) A. Antoine

2 Outline Definitions LBDS Trigger Synchronization & Distribution Trigger Synchronisation Unit Re-trigger Unit Power failure tests Summary The LBDS trigger and re-trigger schemes2

3 Definitions The LBDS trigger and re-trigger schemes Fault tolerant: – Redundancy – Increasing availability and productivity in case of a failure Fail-safe: – Safety functionalities – Known state in case of a failure Redundancy can be a part of the Safety (SIL levels) Fail-safe Fault tolerant 3

4 LBDS Trigger Synchronization & Distribution (Reminder) Fault-tolerant Fail-safe Re-trigger lines A B A B Generator 1 … Generator 15 PTU Power Trigger Unit RTB Re-trigger Box RTB TFO A TFO B Trigger Fan-out Delay > 2 LHC Revolution (2*89  s) TSU A TSU B Client Interfaces F rev Trigger Synchronisation Unit The LBDS trigger and re-trigger schemes4

5 LBDS Trigger Synchronization & Distribution TSU - VME Crate CPU RIO 60xx CTRV (2x) Optical to Electrical converter TSU & Interface – B TSU & Interface – A BLM board (Rear side) The LBDS trigger and re-trigger schemes INTERNAL POWER FAILURE SOURCES 5

6 Trigger Synchronization Unit Main Features Hardware – 2 VME TSU redundant boards – 2 VME signal interface boards – 1 VME backplane RF-signal recovery capability (DPLL) Fault tolerant & Safe behaviour (Redundancy + Sync. crosscheck) Multiple Fail-safe Dump request client detectors Remote diagnostic (VME) Injection Kicker AGK window generation Injection inhibit capability (BIS) The LBDS trigger and re-trigger schemes6

7 Trigger Synchronization Unit Block Diagram The LBDS trigger and re-trigger schemes7

8 TSU-ATSU-BStatusAction Dump Type OK All OKnothingSynchronous OKFALSETSU-B oscillator failure TSU-A Dump immediately TSU-B disable its own dump requestSynchronous FALSEOKTSU-A oscillator failure TSU-B Dump immediately TSU-A disable its own dump requestSynchronous FALSE Timing failure TSU-A & TSU-B dump immediatly Synchronous Or Asynchronous Or Synchronous-Asynchronous Trigger Synchronization Unit Fail-safe Mainly Based on pulsed signals Signals crosschecked used for failure detection: – BRF (Beam revolution Frequency) – DRBRF (Delayed Recovered Beam Revolution Frequency) – Internal Status Discrepancy Detection Concept Synchronisation failure between TSU-A & TSU-B 8

9 Trigger Synchronization Unit Dump Output Managment The LBDS trigger and re-trigger schemes9 Different drivers – redundancy: Fault-tolerent All dump trigger outputs checked for Diagnostics Asynchronous line surveillance: Fault-tolerent Common +12V

10 Re-Trigger Unit Trigger Delay specifications The LBDS trigger and re-trigger schemes10

11 Re-Trigger Unit Trigger Delay Interlock Management Interlock circuit: –I–Input disconnected –O–Output disconnected –I–Internal failure (low voltage of oscillator capacitor) –G–Generates an error signal for the PLC –N–NO DIRECT OUTPUT TRIGGER GENERATED The LBDS trigger and re-trigger schemes11 PLC (Slow control) PLC (Slow control) TSU Rettrigger Delay Rettrigger Delay Interlock Arming/Dump Synchronous Trigger Asynchronous Trigger Retrigger line Power failure on +12V TSU – VME crate !

12 Re-Trigger Unit Mains Monitor The “Mains monitor” board: – Monitor mains 220V of the retrigger crate – Monitor +24V from the power supply – Generate an ASYNCHRONOUS dump in case of a failure – Adjustable Delay (hard coded: 20ms to 100ms) The LBDS trigger and re-trigger schemes12 PLC (Slow control) PLC (Slow control) Rettrigger Delay Rettrigger Delay Interlock Arming/Dump Synchronous Trigger Asynchronous Trigger Retrigger line Mains Monitor TSU

13 Power Failure Tests Cases 1A real correct dump 2LHC: VME crate powering off from CCC 3Test bench: VME crate powering off locally The LBDS trigger and re-trigger schemes13

14 Power Failure Test Results A correct system behaviour The LBDS trigger and re-trigger schemes14

15 Power Failure Test Results Powering off VME crate from CCC The LBDS trigger and re-trigger schemes15

16 Power Failure Test Results Powering off VME crate in the test bench The LBDS trigger and re-trigger schemes16

17 Power Failure Tests Analysis General, in all cases: – TSU units issue synchronous & asynchronous trigger LHC: VME crate powering off from CCC: – BRF missing detection – Synchronous dump type Test bench: VME crate powering off locally – DPLL unlock detection – Synchronous-asynchronous dump type Test difference: the BRF optical to electrical translator seats outside the TSU-VME crate in our test bench The LBDS trigger and re-trigger schemes17

18 Summary All power failure tests lead in the generation of SBDT and ABDT triggering signals. Unfortunately in some cases, SBDT signals can be asynchronous with the beam. There is still potentially dangerous common mode on the triggering paths induced by a permanent short-circuit on the +12V VME line. All asynchronous dump requests (mainly not executed but checked at each dump) are based on the TSUs, the only exception is a power failure of the re-trigger unit. A power cut on the TSU - VME crate generates a synchronous dump by the loss of the BRF signal (fail-safe approach). The LBDS trigger and re-trigger schemes18

19 End The LBDS trigger and re-trigger schemes19


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