1. Penn ESE370 Fall2010 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 36: December 6, 2010 Transmission Lines

2. Last week + today General wire formulation Lossless Transmission Line Reflections at ends of line See in action in lab Where arise? Termination Implications Discuss Lossy Penn ESE370 Fall2010 -- DeHon 2

3. Transmission Lines This is what wires/cables look like –Aren’t an ideal equipotential –Signals do take time to propagate –Shape and topology of wiring effects how signals propagate …and the noise effects they see Penn ESE370 Fall2010 -- DeHon 3

4. Transmission Lines Need to understand –How to model  how to reason about –What can cause noise –How to engineer high performance communication Penn ESE370 Fall2010 -- DeHon 4

5. Transmission Lines Cable: coaxial PCB –Strip line –Microstrip line Twisted Pair (Cat5) Penn ESE370 Fall2010 -- DeHon 5

6. Coaxial Cable Inner core conductor: radius r Insulator: out to radius R Outer core shield (ground) RG-58 Z 0 = 50  – networking, lab (RG-59 Z 0 = 75  – video) Penn ESE370 Fall2010 -- DeHon 6

7. Printed Circuit Board Stripline –Trace between planes Penn ESE370 Fall2010 -- DeHon 7 w t b rr

8. Printed Circuit Board Microstrip line –Trace over single supply plane Penn ESE370 Fall2010 -- DeHon 8 w t h rr 00

9. Twisted Pair Category 5 ethernet cable –100  –V=0.64c 0 Penn ESE370 Fall2010 -- DeHon 9

10. Termination / Mismatch Wires do look like these transmission lines We are terminating them in some way when we connect to gate –Need to be deliberate about how terminate, if we care about high performance Penn ESE370 Fall2010 -- DeHon 10

11. Where Mismatch? Vias Wire corners? Connectors Board-to-cable Cable-to-cable Penn ESE370 Fall2010 -- DeHon 11 http://wiki.altium.com/display/ADOH/An+Overview+of+Electronic+Product+Development+in+Altium+Designer http://www.fpga4fun.com/Hands-on_Flashy.html

12. Visualization http://www.williamson-labs.com/xmission.htm Penn ESE370 Fall2010 -- DeHon 12

13. End of Line Reflection Penn ESE370 Fall2010 -- DeHon 13

14. Termination Cases Parallel at Sink –Pix Series at Source –pix Penn ESE370 Fall2010 -- DeHon 14

15. Pipeline Bits For properly terminated transmission line –Do not need to wait for bits to arrive at sink –Can stick new bits onto wire Penn ESE370 Fall2010 -- DeHon 15

16. Limits to Bit Pipelining What limits? –Risetime/distortion –Clocking Skew Jitter –For bus Wire length differences between lines Penn ESE370 Fall2010 -- DeHon 16

17. Eye Diagrams Watch bits over line on scope –Look at distortion –“open” eye clean place to sample Consistent timing of transitions Well defined high/low voltage levels Penn ESE370 Fall2010 -- DeHon 17 http://en.wikipedia.org/wiki/File:On-off_keying_eye_diagram.svg http://focus.ti.com/analog/docs/gencontent.tsp?familyId=361&genContentId=41762&DCMP=ESD_Solutions&HQS=Other+OT+esd

18. Bad “eye” Penn ESE370 Fall2010 -- DeHon 18 http://archive.chipcenter.com/knowledge_centers/asic/todays_feature/showArticle.jhtml?articleID=12800254

19. Impedance Change What happens if there is an impedance change in the wire? Penn ESE370 Fall2010 -- DeHon 19

20. Z 0 =75, Z 1 =50 At junction: –Reflects V r =(50-75)/(50+75)V i –Transmits V t =(100/(50+75))V i Penn ESE370 Fall2010 -- DeHon 20

21. Impedance Change Z 0 =75, Z 1 =50 Penn ESE370 Fall2010 -- DeHon 21

22. What happens at branch? Penn ESE370 Fall2010 -- DeHon 22

23. Branch Transmission line sees two Z 0 in parallel –Looks like Z 0 /2 Penn ESE370 Fall2010 -- DeHon 23

24. Z 0 =50, Z 1 =25 At junction: –Reflects V r =(25-50)/(25+50)V i –Transmits V t =(50/(25+50))V i Penn ESE370 Fall2010 -- DeHon 24

25. End of Branch What happens at end? If ends in matched, parallel termination –No further reflections Penn ESE370 Fall2010 -- DeHon 25

26. Branch Simulation Penn ESE370 Fall2010 -- DeHon 26

27. Branch with Open Circuit? What happens if branch open circuit? Penn ESE370 Fall2010 -- DeHon 27

28. Branch with Open Circuit Reflects at end of open-circuit stub Reflection returns to branch –…and encounters branch again –Send transmission pulse to both Source and other branch Sink sees original pulse as multiple smaller pulses spread out over time Penn ESE370 Fall2010 -- DeHon 28

29. Open Branch Simulation Penn ESE370 Fall2010 -- DeHon 29

30. Open Branch Simulation Penn ESE370 Fall2010 -- DeHon 30

31. Bus Common to have many modules on a bus –E.g. PCI slots –DIM slots for memory High speed  bus lines are trans. lines Penn ESE370 Fall2010 -- DeHon 31

32. Multi-drop Bus Ideal –Open circuit, no load Penn ESE370 Fall2010 -- DeHon 32

33. Multi-Drop Bus Capacitive load (stub) at drop? –If tight/regular enough, change Z of line Penn ESE370 Fall2010 -- DeHon 33

34. Multi-Drop Bus Long wire stub? –Looks like branch may produce reflections Penn ESE370 Fall2010 -- DeHon 34

35. Lossy Transmission Line How do addition of R’s change? Penn ESE370 Fall2010 -- DeHon 35

36. Lossy Transmission Line R’s cause signal attenuation (loss) –Voltage, energy –Reduced signal swing at sink –Limits length of transmission line before need to restore signal Penn ESE370 Fall2010 -- DeHon 36

37. Transmission Line Noise Frequency limits Imperfect termination Mismatched segments/junctions/vias/connectors Loss due to resistance in line –Limits length Penn ESE370 Fall2010 -- DeHon 37

38. Admin Proj3b due Friday Penn ESE370 Fall2010 -- DeHon 38

39. Idea Transmission lines –high-speed –high throughput –long-distance signaling Termination Signal quality Penn ESE370 Fall2010 -- DeHon 39