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IC Processing. Initial Steps: Forming an active region Si 3 N 4 is etched away using an F-plasma: Si3dN4 + 12F → 3SiF 4 + 2N 2 Or removed in hot.

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Presentation on theme: "IC Processing. Initial Steps: Forming an active region Si 3 N 4 is etched away using an F-plasma: Si3dN4 + 12F → 3SiF 4 + 2N 2 Or removed in hot."— Presentation transcript:

1 IC Processing

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5 Initial Steps: Forming an active region Si 3 N 4 is etched away using an F-plasma: Si3dN4 + 12F → 3SiF 4 + 2N 2 Or removed in hot phosphoric acid After stripping photoresist, field oxide is grown. Field oxide provides insulation between adjacent junctions Photoresist is chemically removed in acid, or stripped in an O 2 plasma

6 N and P wells are formed Photoresist mask is applied, and active ions implanted by ion bombardment. Typically, 150-200 keV accelerating energy After implantation, ions are diffused into substrate to form wells

7 After well formation, additional N and P layers are formed in respective N and P wells, then a layer of polysilicon is deposited. Polysilicon is electrically conductive and used for gate voltage connections.

8 Insulating layers of SiO2 are grown around the gate, followed by N or P bombardment for form the NMOS or PMOS source and drain regions. After forming gate, source and drain regions, Ti film is deposited by sputtering to act as electrical interconnect

9 Ti is reacted with Nw to form TiSi2 where it contacts silicon (black regions) or TiN elsewhere. Then, it is coated with photoresist and etched, followed by deposit of another insulating SiO2 layer. Another coat of photoresist followed by etching exposes gates for connections

10 Finally, aluminum is sputtered on wafer, masked and plasma etched. Additional interconnect layers may be added the same way. A barrier region of TiN is applied, followed by thin-film application of W, which undergoes CMP to provide a flat surface with exposed contacts

11 SEM photograph of interconnects formed in an integrated circuit. Conductive metals are carefully chosen to provide right conductivity (or resistivity) and dielectric properties

12 Photolithography

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17 K 1 ~ 0.6-0.8 and K 2 ~ 0.5. NA is the numerical aperture number, NA=n*sin(  ) where n=1 and  is the angle formed by the point light source and the aperture width

18 Example Estimate the resolution and depth of focus of an excimer laser stepper using KrF light source ( = 248 nm) and NA=0.6 Assume k 1 = 0.75 and k 2 = 0.5. Solution: R = k 1 * /NA = 0.75(0.248/0.6) = 0.31 nm DOF = ± k 2 * /NA 2 = ±0.5(0.248/(0.6) 2 ) = ±0.34  m

19 Shrinking device size drives need for finer replication methods:

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28 Typical Photoresist Problems

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30 Wet and Dry Etching

31 Wet Chemical Treatment

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34 Etching Challenges

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36 Dry Etching

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41 Wet vs Dry Etching

42 Thin Films and Diffusion

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45 Diffusion is not constant across cross section, and continues with every subsequent high-temperature step; hence, we use charts as below to calculate surface concentrations, Cs, from average conductivity,

46 Effective diffusivity is: D A eff =D o +D - (n/n i )+D = )n/n i ) 2 for N-type D eff A =D o +D + (p/n i )+D ++ (p/n i ) 2 for P-type Values are tabulated, as in table 7.5 Effective diffusion-time, (Dt) eff, is the sum of the diffusivity and time at each step: (Dt) eff = D 1 t 1 +D 1 t 2 (D 2 /D 1 )=D 1 t 1 +D 2 t 2

47 Diffusion Data

48 Example Figure 7-17 Dopant surface concentration vs. effective conductivity for various substrate concentrations, C B

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50 Chemical Vapor Deposition (CVD)

51 Typical thin-film problems

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53 Sputtering

54 Physical Vapor Deposition (PVD)

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62 Suggested exercises Do Problem 2.1 in Silicon VLSI Technology Look over example problem (7.3) and examples on page 390 and 412.


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