1. Michał Dwużnik, for the SCT collaboration
Quality Assurance System for the Endcap Hybrids of the ATLAS Semiconductor Tracker
Michał Dwużnik,
for the SCT collaboration
AGH University of Science and Technology,
Faculty of Physics and Applied Computer Science
Krakow, Poland

2. LECC 2005, Michał Dwużnik, AGH Krakow
ATLAS Inner Detector
61 m2 of Silicon
4088 modules in total
1976 forward modules
2112 barrel modules
6.3*106 channels
~1% occupancy
4 layers
9 disks each side
LECC 2005, Michał Dwużnik, AGH Krakow

3. LECC 2005, Michał Dwużnik, AGH Krakow
Module flavours
~120 mm (60 mm) AC coupled strips
1536 channels
Double sided readout
Limited R(z) resolution (40 mrad tilt)
Data communication via double optical link or redundant LVDS
LECC 2005, Michał Dwużnik, AGH Krakow

4. Endcap module construction
DORIC/VDC chips
strip direction
12 ABCD3T Readout chips
Connectors
Sensors
Carbon spine
Kapton PCB
Hybrid
Fanouts
LECC 2005, Michał Dwużnik, AGH Krakow

5. LECC 2005, Michał Dwużnik, AGH Krakow
Hybrid functionality
HV/LV distribution and filtering
Heat removal
Mechanical support
Readout
LECC 2005, Michał Dwużnik, AGH Krakow

6. LECC 2005, Michał Dwużnik, AGH Krakow
ABCD3T readout chip
Input register
Preamp, shaper
discriminator
132 cell FIFO
Derandomiser
Output buffers
128 channels
Binary readout
Channel by channel threshold correction
Bypass functionality
Control logic
BIAS,DACs,
calibration
LECC 2005, Michał Dwużnik, AGH Krakow

7. DORIC and VDC transmission chips
Digital Optical Receiver IC
Pin diode BPM signal-> LVDS command and clock
VCSEL Driver Circuit
LVDS data -> Pin driving SE signal
Not qualified technology -> rad-hardness added by design only
LECC 2005, Michał Dwużnik, AGH Krakow

8. Why do we need _hybrid_ Quality Assurance?
Cost/component loss minimization
Hybrid -> repairs possible
Module -> repairs practically impossible
Performance measurements
„parameter map” (SCT DB)
„Infant mortality”
Cost minimization - dete
LECC 2005, Michał Dwużnik, AGH Krakow

9. LECC 2005, Michał Dwużnik, AGH Krakow
Production chain
ABCD3T
Wafer screening
Manufacturer:
Assembly,
Simple check
Hybrid QA sites
DORIC/VDC
Wafer screening
Module production
sites
Other
components
LECC 2005, Michał Dwużnik, AGH Krakow

10. LECC 2005, Michał Dwużnik, AGH Krakow
SCT database
LECC 2005, Michał Dwużnik, AGH Krakow

11. LECC 2005, Michał Dwużnik, AGH Krakow
Wafer screening
Doric4a
Power/LVDS level check
Clock generation/synchronization
Data decoding
35/45 Mhz operation
3.5/4.5 V operation
VDC
Power test
Standby current test
Output waveform test
ABCD3T
Digital functionality (Vdd, frequency)
Direct DAC measurements
Mater/slave functionality
BC counters
„Characterization” (analogue parameters)
LECC 2005, Michał Dwużnik, AGH Krakow

12. LECC 2005, Michał Dwużnik, AGH Krakow
Hybrid Test Chain
Manufacturer:
Basic functionality
QA site
Visual inspection
„Warm” Characterization (4h, 55 °C)
Burn-in test/long term stability (40h, 55 °C)
„Cold” characterization (6h, 0 °C)
Module assembly site
Basic functionality (reception test)
LECC 2005, Michał Dwużnik, AGH Krakow

13. LECC 2005, Michał Dwużnik, AGH Krakow
Characterization
Digital/communication tests
Command delay
Bypass functionality
Redundancy test
Pipeline test
Strobe delay test
„Analogue” (calibrated response)
Three Point Gain
Trim Range
Response Curve
Timewalk
Noise occupancy test („physical”response)
confirmation test
LECC 2005, Michał Dwużnik, AGH Krakow

14. LECC 2005, Michał Dwużnik, AGH Krakow
Acceptance criteria
Succesfull visual inspection
Full digital functionality
<1% dead (faulty) channels
Sufficient biasing margins
Bypass functionality with nominal and reduced supply
Continuous HV line
No discrepancy between calibration and noise pulse response
LECC 2005, Michał Dwużnik, AGH Krakow

15. LECC 2005, Michał Dwużnik, AGH Krakow
„Successful” hybrid
LECC 2005, Michał Dwużnik, AGH Krakow

16. Noise/calibration consistency
LECC 2005, Michał Dwużnik, AGH Krakow

17. LECC 2005, Michał Dwużnik, AGH Krakow
Visual Inspection
Chipped chip Solder Rebond Rebond
Scratch Glue/solder contact Clumsy fingers….
LECC 2005, Michał Dwużnik, AGH Krakow

18. Miscalibration example
Input charge
VT 50
LECC 2005, Michał Dwużnik, AGH Krakow

19. LECC 2005, Michał Dwużnik, AGH Krakow
„Negative offset”
Input charge
VT 50
LECC 2005, Michał Dwużnik, AGH Krakow

20. Large Gain Spread/bias margin
0 (sic!) DAC units
LECC 2005, Michał Dwużnik, AGH Krakow

21. Strobe delay line defect
LECC 2005, Michał Dwużnik, AGH Krakow

22. Production statistics
2586 produced hybrids
2477 accepted ones (95,7 %)
32 thrashed (1,3 %)
77 „on hold” (unknown status) (3 %)
359 reworks by manufacturer
52 hybrids reworked twice
10 hybrids reworked 3 times
1 hybrid reworked 4 times (and accepted)
1 hybrid reworked 5 times (and rejected…)
LECC 2005, Michał Dwużnik, AGH Krakow

23. LECC 2005, Michał Dwużnik, AGH Krakow
Conclusions
Distributed production is possible
No significant infant mortality (within test time)
Communication is crucial in the collaboration
Manufacturer delivery rate oscillates
Full test automation is impossible (despite best effort)
Sufficient volume makes the most bizarre defects appear…
LECC 2005, Michał Dwużnik, AGH Krakow