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Published byDaniel Hancock Modified over 9 years ago
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Tutorial 5: Simulating a Design
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Introduction This tutorial covers how to perform a functional simulation as well as a timing simulation with the Xilinx software. A one-bit comparator was chosen as the example circuit.
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One-Bit Comparator
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Opening the Simulator Simulation Icon Tools -> Simulation/Verification -> Gate Simulator Update Netlist
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Selecting input and output signals Chip Icon Signal -> Add Signal
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Component Selection Select Inputs and Outputs Add button Double-Clicking Close button
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Test Pins SC button Tools -> Schematic Capture Simulation Toolbox Icon Mode -> Testpoint Click on net name to create probe Sim Icon to return
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Adding Stimuli Stimulator icon Signal -> Add Stimulators Binary Counter to mark inputs Close Stimulator window
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Defining the Frequency of the free-running Counter Options -> Preferences B0 Period drop-down list B0 Frequency adjusts automatically
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Doing the Simulation and Viewing the Waveforms “Functional” from pull down menu Simulation Step (footstep) Adjust step size with pull down menu Ruler Icon – adjust scale of time axis
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Schematic Simulation SC Icon Logic Values of each signal Gray Boxes -> Colored Boxes
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Timing Simulation Detailed information of timing delays First implement design – Implementation Icon Verification Button (Timing Simulation) Select components from Signals Selection and Chip Selection Close to return
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Doing the Simulation and Measuring Delays “Timing” from pull down menu Step Icon (footsteps) Measure Delay – Waveform -> Measurements -> Measurements on Select start and end points
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