1. ID 711L: Getting Started with a Real- Time Kernel Matt Gordon Sr. Applications Engineer Version: 1.1 Micriµm 12 October 2010

2. Matt Gordon Sr. Applications Engineer Responsible for demos and example projects Multiple articles and white papers Head of Micriµm’s training program 2 Previous Experience Software engineer at Micriµm – Developed device drivers and kernel ports Bachelor’s degree in computer engineering from Georgia Tech

3. Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** Solutions for Innovation ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis).

4. 4 Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). Solutions for Innovation

5. 5 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose

6. 6 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose

7. Innovation 7

8. Benefitting from a Real-Time Kernel It is possible for developers who use a real-time kernel to complete innovative products at low cost and in relatively little time. However, in order to achieve these benefits developers must select a reliable, easy-to-use kernel, and must know how to properly use the services that the kernel offers. 8

9. Agenda A Brief Introduction to Micriµm and µC/OS-III Source Code and Tools Lab 1 Initiating Multitasking Ports and Configuration Files The Anatomy of a Task Lab 2 9

10. Agenda (Cont.) Scheduling Interrupts and Exceptions Lab 3 µC/OS-III’s Services Lab 4 Conclusion 10

11. 11 Key Takeaways By the end of this session, you will … Be familiar with the µC/OS-III API Be capable of creating tasks with µC/OS-III Understand how µC/OS-III schedules tasks Know how to write interrupt handlers for µC/OS-III-based applications Understand the services that µC/OS-III provides

12. A Brief Introduction to Micriµm and µC/OS-III 12

13. An Overview of Micriµm Founded in 1999 Provider of high-quality embedded software Known for remarkably clean code Kernel, protocol stacks, file system, and GUI Renesas example projects available 13

14. µC/OS-III Micriµm’s latest kernel Not a µC/OS-II replacement Offers many features not available from µC/OS-II Round-robin scheduling, two interrupt schemes, support for any number of tasks Port structure is nearly identical to that of µC/OS-II 14

15. µC/OS-III, The Real-Time Kernel Book can be purchased with one of two different Renesas boards First part of the book describes how the kernel was implemented and how it can be used 15 Second part is board-specific and covers µC/OS-III example projects Everything needed to run the kernel is provided with the book

16. Source Code and Tools 16

17. A µC/OS-III-Based Application 17 Application Code Micriµm’s Modules (Portable Code) Micriµm’s Modules (Hardware-Specific Code)

18. µC/LIBµC/CPUµC/OS-III A µC/OS-III-Based Application (Cont.) 18 Application Code µC/CPUµC/OS-IIIBSP

19. Directory Structure 19 Application Code BSP µC/OS-III µC/LIB µC/CPU

20. High-Performance Embedded Workshop (HEW) Full-featured IDE with support for SuperH, M32R, M16C, R8C, H8SX, H8S, H8, and RX Functionality can be extended via TargetServer HEW example projects available from the Micriµm Web site 20

21. Lab 1: Becoming Familiar with µC/OS-III 21

22. Lab 1 Summary µC/OS-III is made up of multiple C source and header files The kernel is provided as a precompiled library in most of Micriµm’s example projects A µC/OS-III-based application looks much like any other C program Application code interacts with µC/OS-III through the kernel’s API 22

23. Initiating Multitasking 23

24. Characteristics of µC/OS-III-Based Applications main() is declared, as in any C program Kernel API functions are invoked At least one task is present Tasks are C functions 24

25. OSInit() Must be invoked before any kernel services are used Initializes data structures Creates internal tasks Number of tasks depends on configuration 25

26. µC/OS-III Internal Tasks Always Present Idle Task Automatically given lowest priority Tick Task Synchronized with a periodic interrupt Allows µC/OS-III to provide time delays Optional Statistics Task Monitors resource usage ISR Handler Task Facilitates deferred interrupt scheme Timer Task Manages software timers 26

27. Creating a Task 27 void OSTaskCreate (OS_TCB *p_tcb, CPU_CHAR *p_name, OS_TASK_PTR p_task, void *p_arg, OS_PRIO prio, CPU_STK *p_stk_base, CPU_STK *p_stk_limit, OS_STK_SIZE stk_size, OS_MSG_QTY q_size, OS_TICK time_quanta, void *p_ext, OS_OPT opt, OS_ERR *p_err); The task itself The task’s priority A pointer to the task’s stack

28. Creating a Task (Cont.) Why is OSTaskCreate() necessary? Initialize data structures associated with the task – TCB – Stack 28

29. A Task Control Block (TCB) Contains information on the task’s status 29 23 - 51 fields StkPtr ExtPtr StkLimitPtr NextPtr PrevPtr

30. Stacks In µC/OS-III, each task has a stack Context is stored on stacks Stack growth conventions vary across platforms 30 PSW (0x00010000) PC (p_task) R15 (0x15151515) R14 (0x14141414) R13 (0x13131313) R12 (0x12121212) R11 (0x11111111) R10 (0x10101010) R9 (0x09090909) R8 (0x08080808) R7 (0x07070707) R6 (0x06060606) R5 (0x05050505) R4 (0x04040404) R3 (0x03030303) R2 (0x02020202) R1 (p_arg) p_stk Higher memory addresses Lower memory addresses

31. OSStart() Initiates multitasking by running the highest priority task CPU registers are loaded with values from the task’s stack Unless errors occur, should be the last function called from main() 31

32. Port and Configuration Files 32

33. A µC/OS-III Port Architecture-specific code that implements context switches and other operations At least partially implemented in assembly Three files – os_cpu.h, os_cpu_a.asm, os_cpu_c.c 33

34. Writing a µC/OS-III Port Best to start from a µC/OS-II port Process described in µC/OS-III book For Renesas devices, port may already be available from Micriµm 34

35. Additional Hardware-Specific Code µC/CPU Written for a particular architecture Code for disabling interrupts, making measurements, and more Utilized by µC/OS-III and other Micriµm modules Board Support Package (BSP) Written for a particular board Code for managing LEDs, push buttons, and other components Little or no BSP code required by µC/OS-III 35

36. Configuration Files Define numerous constants Configuration often differs from application to application Template files are provided with the kernel 36

37. Configuration Files (Cont.) os_cfg.h – used to enable various kernel services os_cfg_app.h – allows configuration of kernel tasks os_type.h – defines data types used by the kernel 37

38. The Anatomy of a Task 38

39. Task Basics A task is a C function Most tasks are periodic Tasks cannot return Tasks are managed by the kernel 39

40. A Template Task static void App_TaskExample (void *p_arg) { Perform initializations; while (1) { Work toward task’s goals; } 40

41. Lab 2: Writing a Task 41

42. Lab 2 Summary Tasks can be created via calls to OSTaskCreate() Only one task should be created in main() Each task has its own stack A priority must be assigned to each task 42

43. Scheduling 43

44. Two Types of Multitasking Scheduling differs from kernel to kernel There are two common approaches to scheduling multiple tasks Cooperative scheduling Preemptive scheduling 44

45. Cooperative Scheduling 45 Task B Task A ISR Time Interrupt signals the availability of Task A’s data Task A cannot run until Task B completes

46. Preemptive Scheduling 46 Low-Priority Task High-Priority Task ISR Time Interrupt signals the availability of the high- priority task’s data The high-priority task is scheduled by the kernel

47. Round-Robin Scheduling 47 Task C Task B Task A Time Time Quantum

48. Scheduling in µC/OS-III µC/OS-III is preemptive The scheduler’s objective is to run the highest priority ready task A table of task priorities is used Round-robin scheduling is performed when enabled 48

49. Push registers onto stack A Context Switch 49 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 (SP) PSW PC R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 PSW PC PSW R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 Switch from Task A to Task B Save stack pointerUpdate kernel variablesLoad new stack pointerPop registers from stack OSTCBCurPtr->StkPtrOSTCBCurPtrOSPrioCur Task A’s stackTask B’s stack

50. Task-Initiated Context Switches Context switches can occur when tasks wait for events Example: the reception of a packet Waiting is accomplished with kernel functions 50

51. Task-Initiated Context Switches (Cont.) 51 ADC Task (Low Priority) USB Task (High Priority) ISR Time The USB ISR signals the USB task The USB task is scheduled by the kernel The USB task begins waiting for the arrival of a USB packet The kernel switches to another task

52. Time Delays 52 void OSTimeDly (OS_TICK dly, OS_OPT opt, OS_ERR *p_err); void OSTimeDlyHMSM (CPU_INT16U hours, CPU_INT16U minutes, CPU_INT16U seconds, CPU_INT32U milli, OS_OPT opt, OS_ERR *p_err);

53. Interrupts and Exceptions 53

54. Context Switches from ISRs In a preemptive kernel, interrupts can result in context switches 54 ExampleISR: Save CPU registers; OSIntEnter(); App_ISR(); OSIntExit(); Restore CPU registers; Return from interrupt; void App_ISR (void) { /* Clear interrupt */ /* Signal task */ } Determine whether a context switch is needed

55. Interrupts on the RX Routed through the Interrupt Control Unit (ICU) Can be assigned different priorities Addresses of handlers are contained in a vector table Table has 255 entries Address of table specified by the Interrupt Table Register (INTB) 55 IRQ0 IRQ15 On-chip peripherals Interrupt request ICUCPU

56. Writing ISRs for the RX Best to use OSTickISR() as a template Declared in os_tick_a.src Assembly code from OSTickISR() can be copied into every other handler The.RVECTOR directive must be modified The call to OSTimeTick() must be replaced with a call to an application-specific function Peripheral-specific code can be written in C 56

57. Lab 3: ISRs 57

58. Lab 3 Summary Some kernel-specific code is required in µC/OS-III interrupt handlers A template should be used to write new interrupt handlers µC/OS-III allows multiple tasks to share a priority 58

59. Beyond Task Switching 59

60. Kernel Services A kernel does more than just switch between tasks Synchronization Inter-task communication Resource protection 60

61. Synchronization Can be thought of as signaling Tasks can be signaled by ISRs or by other tasks While one task waits for a signal, other tasks run 61

62. Semaphores A means of synchronization Based on a counter Counter value indicates whether or not an event has occurred Two basic operations Pend: wait for event Post: signal occurrence of event 62

63. Semaphore API 63 void OSSemCreate (OS_SEM *p_sem, CPU_CHAR *p_name, OS_SEM_CTR cnt, OS_ERR *p_err); OS_SEM_CTR OSSemPend (OS_SEM *p_sem, OS_TICK timeout, OS_OPT opt, CPU_TS *p_ts, OS_ERR *p_err); OS_SEM_CTR OSSemPost (OS_SEM *p_sem, OS_OPT opt, OS_ERR *p_err);

64. Semaphore Example 64 ISR ADC Task MUX ADC Analog Inputs

65. Semaphore Example (Cont.) 65 OS_SEM App_SemADC; /* Initialization Code */ OSSemCreate((OS_SEM *)&App_SemADC, (CPU_CHAR *)”ADC Sem”, (OS_SEM_CTR)0, (OS_ERR *)&err); void App_ISRADC (void) { Clear interrupt; OSSemPost((OS_SEM *)&App_SemADC, (OS_OPT )OS_OPT_POST_1, (OS_ERR *)&err); } void App_TaskADC (void *p_arg) { Perform initializations; while (1) { Start conversion; OSSemPend((OS_SEM *)&App_SemADC, (OS_TICK )0, (OS_OPT )OS_OPT_PEND_BLOCKING, (CPU_TS *)&ts, (OS_ERR *)&err); Process converted value; }

66. Task Semaphores An alternative to standard semaphores in µC/OS-III Lower overhead 66 TCB SemCtr SemPendTime SemPendTimeMax OS_SEM Type NamePtr PendList Ctr TS

67. Event Flags Another means of synchronization Each event represented by a bit Pend and post operations Pend for multiple events 67

68. Event Flag API 68 void OSFlagCreate (OS_FLAG_GRP *p_grp, CPU_CHAR *p_name, OS_FLAGS flags, OS_ERR *p_err); OS_FLAGS OSFlagPend (OS_FLAG_GRP *p_grp, OS_FLAGS flags, OS_TICK timeout, OS_OPT opt, CPU_TS *p_ts, OS_ERR *p_err); OS_FLAGS OSFlagPost (OS_FLAG_GRP *p_grp, OS_FLAGS flags, OS_OPT opt, OS_ERR *p_err);

69. Shared Resources Peripheral devices, buffer pools, or simple global variables Accessed by more than one task or by at least one task and one ISR Can cause race conditions 69

70. Shared Resource Example 70 void App_TaskUART (void *p_arg) { Perform initializations; while (1) { Write message to UART; Delay for 1s; } void App_TaskFS (void *p_arg) { Perform initializations; while (1) { Read file; Write status to UART; }

71. Protecting Shared Resources Disabling and enabling interrupts Locking and unlocking the scheduler Semaphores Mutexes 71

72. Mutexes Implemented much like semaphores Manipulated through pend and post functions Offer protection against priority inversion 72

73. Mutex API 73 void OSMutexCreate (OS_MUTEX *p_mutex, CPU_CHAR *p_name, OS_ERR *p_err); void OSMutexPend (OS_MUTEX *p_mutex, OS_TICK timeout, OS_OPT opt, CPU_TS *p_ts, OS_ERR *p_err); void OSMutexPost (OS_MUTEX *p_mutex, OS_OPT opt, OS_ERR *p_err);

74. Mutex Example 74 Clock Task Seconds Minutes Hours Days DOW Month Year Clock Variables FS Task Get time of day Update clock Mutex

75. Mutex Example (Cont.) 75 OS_MUTEX App_MutexClk; /* Initialization Code */ OSMutexCreate((OS_MUTEX *)&App_MutexClk, (CPU_CHAR *)”Clk Mutex”, (OS_ERR *)&err); void App_TaskClk (void *p_arg) { while (1) { Wait for signal from timer ISR; OSMutexPend((OS_MUTEX *)&App_MutexClk, (OS_TICK )0, (OS_OPT )OS_OPT_PEND_BLOCKING, (CPU_TS *)&ts, (OS_ERR *)&err); Update clock; OSMutexPost((OS_MUTEX *)&App_MutexClk, (OS_OPT )OS_OPT_POST_NONE, (OS_ERR *)&err); }

76. Inter-Task Communication Sending and receiving messages Tasks can send or receive ISRs can send Messages are stored in a queue managed by the kernel While one task waits for a message, other tasks run 76

77. Message Queue API 77 void OSQCreate (OS_Q *p_q, CPU_CHAR *p_name, OS_MSG_QTY max_qty, OS_ERR *p_err); void *OSQPend (OS_Q *p_q, OS_TICK timeout, OS_OPT opt, OS_MSG_SIZE *p_msg_size, CPU_TS *p_ts, OS_ERR *p_err); void OSQPost (OS_Q *p_q, void *p_void, OS_MSG_SIZE msg_size, OS_OPT opt, OS_ERR *p_err);

78. Message Queue Example 78 USB Task USB ISR Message Queue void App_TaskUSB (void *p_arg) { while (1) { p_buf = OSQPend((OS_Q *)&App_QUSB, (OS_TICK )0, (OS_OPT)OS_OPT_PEND_BLOCKING, (OS_MSG_SIZE *)&msg_size, (CPU_TS *)&ts, (OS_ERR *)&err); Process packet; } OS_Q App_QUSB; /* Initialization Code */ OSQCreate((OS_Q *)&App_QUSB, (CPU_CHAR *)”USB Queue”, (OS_MSG_QTY)20, (OS_ERR *)&err); void App_ISRUSB (void) { Clear USB (or DMA) interrupt; OSQPost((OS_Q *)&App_QUSB, (void *)p_buf, (OS_MSG_SIZE)buf_size, (OS_OPT )OS_OPT_POST_FIFO, (OS_ERR *)&err); }

79. Task Message Queue Message queue included in TCB Less overhead than standard message queue Can be used whenever only one task will be receiving messages 79

80. Additional Services Multi-pend Pend on multiple queues and semaphores Dynamic memory allocation Timers One-shot and periodic software timers with callbacks 80

81. Lab 4: Task Synchronization 81

82. Lab 4 Summary In general, it is desirable to keep interrupt handlers as short as possible Using semaphores, interrupt handlers can signal tasks The two primary semaphore operations are pend and post 82

83. Conclusion 83

84. Summary Today we discussed … µC/OS-III’s initialization functions The structure of a µC/OS-III task How µC/OS-III performs a context switch µC/OS-III interrupt handlers The services, other than task management, provided by µC/OS- III 84

85. Questions? 85

86. Innovation 86

87. Thank You! 87