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Published byClaire McKinney Modified over 9 years ago
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1 VFE/MGPA considerations for EE/VPT EB/EE electrical spec. differences: full-scale signal noise input capacitance dominated by: APD capacitance (x2) for barrel VPT -> MGPA interconnect for end-cap MGPA suits barrel and endcap full-scale signal requirements because input stage gain defined by external feedback components Detailed lab measurements so far concentrated on EB application, but linearity and pulse shape matching performance dominated by gain and diff. O/P stages => should be same for EE Some EE specific measurements exist for noise and pulse shape, but not extensively studied so far ParameterBarrel (APD)End-Cap (VPT) fullscale signal60 pC16 pC noise level (ENC)10000e (1.6 fC)3500e (0.56 fC) input capacitance~ 200 pF (APD)~ 50 pF (cable) output signals (to match ADC) differential 1.8 V, 0.45 V around Vcm = Vdd/2 = 1.25 V gain ranges 1, 6, 12 10 % pulse shaping40 ns CR-RC nonlinearity (each range) < 0.1 % fullscale pulse shape matching (Vpk-25)/Vpk < 1 % within and across gain ranges MGPA Target Specifications Mark Raymond (Nov.2004)
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2 MGPA Architecture RFRF R G1 diff. O/P stages CFCF V CM CICI RIRI gain stages RIRI DAC I 2 C and offset generator ext. trig. input stage C F chosen for max. poss. gain depending on barrel/end-cap R F chosen for 40 ns decay avoids pile-up C F R F external components => 1 chip suits barrel & end-cap C F //R F = 39pF//1k (barrel) = 8p2//4k7 (endcap) differential current O/P stages external termination 2R I C I = 40 nsec. => low pass filtering on all noise sources within chip 3 gain channels 1:6:12 set by resistors (on-chip), for linearity, feeding common- gate stages C CAL R G2 R G3 I/P V CM CICI RIRI RIRI CICI RIRI RIRI RFCFRFCF i i i input stage charge amp. V CM
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3 Transistor Level Schematic
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4 Noise Sources input stage high C f (low gain) to cope with large full-scale signals => corresponding low R f for 40 ns time const. => R f noise dominates over input FET barrel ENC (C IN =200pF) end-cap ENC (C IN = 50 pF) R f noise4900 e2700 e I/P FET1800 e660 e total5220 e2780 e gain stage contribution can’t avoid for low gain range (R G big) but this range only used for larger signals so signal/noise still acceptable input stage RGRG common-gate gain stage i CG i RG C IN v FET source follower diff. output stage v Rf RfRf CfCf hand calculation these values calculated for C F //R F = 39pF//1k (barrel) C F //R F = 12pF//3k3 (endcap) (v FET ~ 0.23 nV/(Hz) 1/2 )
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5 CFCF RFRF fullscale signal [pC] R F noise [e] 6p85k638.110.52048 8p24k738.512.62236 10p3k939.015.42475 12p3k339.618.52700 39p1k39.0604900 Choice of 1 st stage feedback components depends on fullscale signal requirement (VPT response and dynamic range requirement) values normalised to 60 pC barrel fullscale barrel case
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6 Noise Measurement (VFE card) ENC [rms electrons] added capacitance [pF] high gain chan.mid gain chan. high gain chan. weak dependence on input capacitance as expected within spec. for high and mid-gain ranges: barrel < 10000 e, end-cap < 3500 e low gain range: barrel: 27300 e ± 12% end-cap: 8200 e ± 11% completely dominated by gain stage noise but signals large => electronic noise not significant (< 0.2% contribution to overall barrel energy res’n.) BARREL (C F //R F = 39pF//1k)END-CAP (C F //R F = 8p2//4k7) 7240+5.8/pF 3040+4.5/pF 3270+4.5/pF 7870+4.9/pF
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7 End-cap VPT interface coax Cdet I(t) MGPA CSA O/P chip O/P I(t) current source with 10 ns decay time Cdet = 5 pF (2 pF + stray) coax = RG 179 (thin 50 ohm) 75 cm long some ringing observable at input stage O/P smoothed out at chip O/P End-cap signal simulation with coax without coax with coax without coax previously presented at design review (Jan.2003)
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8 Measurement 80 cm. thin 50 coax MGPA 2 pF high gain range ~ ¾ fullscale signal pulse shapes at chip O/P
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9 coaxMGPA Specific EE issues input protection on-chip protection not sufficent to withstand VPT breakdown (RAL measurements already proved) => additional external protection diode => extra capacitance (~ few 10’s pF shouldn’t be a problem) => prot. diode rad-hardness issues more remote opto-electric transducer => transmission line effects => grounding/shielding issues HV filter card diagram - courtesy Claire Shepherd-Themistocleous
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