1. Semiconductor pn junctions

2. Built-in potential defined by equilibrium and levels N A, N D far from metallurgical junction  0 = V T ln[n n0 /n p0 ] = V T ln [(N D × N A )/ n i 2 ]

3. Existence of  0 implies E-field and acknowledges impurity sites uncovered by equilibrium process.

4. Simplest case, uniform impurity levels, abrupt transition from N A to N D

5. Analysis of abrupt junction

6. E MAX = Q S /  S Qs = qN D x n = qN A x p = qN B W Debye length E MAX = 2  J /W

7. Diffused junction (a.k.a. linearly-graded) junction

8. Analysis of linearly-graded junction

10. E MAX = (qaW 2 /8)/  S = Q S /  S a ≡ grading coefficient = (N A + N D )/d  J = qaW 3 /12  S = (qaW 2 /8)W/1.5  S= = Q S W/1.5  E MAX = W =

11. Junction Capacitance

12. pn junction incremental capacitance

13. pn junction capacitance CJ =CJ == C J0 = zero bias capacitanceMJ = grading coeffficient

14. Doping profile: Courtesy of voltage slope of reciprocal capacitance Y-axis intercept consistent with (1/4pF) 2 Constant slope consistent with (elected) MJ = 0.5