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Chapter 11 Instruction Sets: Addressing Modes and Formats

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1 Chapter 11 Instruction Sets: Addressing Modes and Formats
Ren-Jie Wang 王仁傑, Ph.D. 資訊館7F辦公室 上課時間: 星期三 13:25—16:10

2 Addressing Modes 定址模式 Immediate Addressing 立即定址 Direct Addressing 直接定址
Indirect Addressing 間接定址 Register Addressing 暫存器定址 Register Indirect Addressing 暫存間接器定址 Displacement Addressing 位移定址 Relative Addressing 相對定址 Base-Register Addressing 基底暫存器定址 Indexed Addressing 索引定址 Stack Addressing 堆疊定址 2

3 Operand is part of instruction Operand = address field e.g. ADD 5
Immediate Addressing Operand is part of instruction Operand = address field e.g. ADD 5 Add 5 to contents of accumulator ( AC←AC+5 ) 5 is operand No memory reference to fetch data Fast Limited range (why?) 3

4 Immediate Addressing Diagram
Instruction Opcode Operand 運算碼 (指令) 運算元 (資料) 4

5 Direct Addressing Address field contains address of operand
Effective address (有效位址)EA = address field A e.g. ADD A Add contents of cell A to accumulator ( AC←AC+A ) Look in memory at address A for operand Single memory reference to access data No additional calculations to work out effective address Limited address space (why?) 5

6 Direct Addressing Diagram
Instruction Opcode Address A Memory ADD A Operand 6

7 Indirect Addressing (1)
Memory cell pointed to by address field contains the address of (pointer to) the operand EA = (A) Look in A, find address (A) and look there for operand e.g. ADD (A) Add contents of cell pointed to by contents of A to accumulator (A) : Content of location A or register A 7

8 Indirect Addressing (2)
Large address space 2N where N = word length May be nested, multilevel, cascaded e.g. EA = (((A))) Draw the diagram yourself Multiple memory accesses to find operand Hence slower 8

9 Indirect Addressing Diagram
Instruction Opcode Address A Memory ADD (A) Pointer to operand Operand 9

10 Indirect Addressing Diagram
Instruction Opcode Address A Memory ADD ((A)) Pointer to operand Pointer to operand Operand 9

11 Register Addressing (1)
Operand is held in register named in address filed EA = R Limited number of registers Very small address field needed Shorter instructions Faster instruction fetch 10

12 Register Addressing (2)
No memory access Very fast execution Very limited address space Multiple registers helps performance Requires good assembly programming or compiler writing C programming register int a; c.f. Direct addressing 11

13 Register Addressing Diagram
Instruction Opcode Register Address R Registers Operand 12

14 Register Indirect Addressing
C.f. indirect addressing EA = (R) Operand is in memory cell pointed to by contents of register R Large address space (2N) One fewer memory access than indirect addressing 13

15 Register Indirect Addressing Diagram
Instruction Opcode Register Address R Memory ADD (R) Registers Pointer to Operand Operand 14

16 Displacement Addressing
EA = A + (R) Address field hold two values A = base value 基底 R = register that holds displacement 位移 or vice versa 反之亦然 15

17 Displacement Addressing Diagram
Instruction Opcode Register R Address A Memory Registers Pointer to Operand + Operand 16

18 A version of displacement addressing R = Program counter, PC
Relative Addressing A version of displacement addressing R = Program counter, PC EA = A + (PC) PC-relative i.e. get operand from A cells from current location pointed to by PC c.f locality of reference & cache usage 17

19 + Relative Addressing Instruction Opcode Address A Memory PC Operand
Pointer to Operand Operand

20 Base-Register Addressing
A holds displacement R holds pointer to base address R may be explicit or implicit 外顯或隱含 e.g. segment registers in 80x86 18

21 Good for accessing arrays
Indexed Addressing A = base R = displacement EA = A + (R) Good for accessing arrays (R) = (R) +1 19

22 Combinations Pre-index 前索引定址模式 (先更新索引,再存取資料)
然後基底暫存器的值再更新成新的位址 EA = (A+(R)) ARM指令: LDR R0, [R1, #4]! ;R0:=[R1+4], R1:=R1+4 Post-index 後索引定址模式 (先存取資料,後更新索引) 基底暫存器的值會先用來當所要存取的記憶體位址 存取資料後,基底暫存器的值再更新成新的位址 EA = (A) + (R) ARM指令: LDR R0, [R1], #4 ;R0:=[R1], R1:=R1+4 20

23 Pre-index: EA = (A+(R))
Instruction Opcode Register R Address A Memory Base Registers Displacement + Pointer to Operand Operand

24 Post-index: EA = (A) + (R)
Instruction Address A Opcode Register R Memory Registers Base Displacement + Operand

25 Operand is (implicitly) on top of stack e.g.
Stack Addressing Operand is (implicitly) on top of stack e.g. ADD Pop top two items from stack and add Textbook p. 398, problems #11.13 21

26

27 IA-32 (Pentium 4) Registers
Streaming SIMD Extensions MMX: SIMD instruction set

28 purposes in different

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30 Pentium Addressing Modes
Virtual or effective address is offset into segment Starting address plus offset gives linear address This goes through page translation if paging enabled 12 addressing modes available Immediate Register operand Displacement Base Base with displacement Scaled index with displacement Base with index and displacement Base scaled index with displacement Relative

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34 Pentium Addressing Mode Calculation

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36 Instruction Formats 11.3 Layout of bits in an instruction Includes opcode Includes (implicit or explicit) operand(s) Usually more than one instruction format in an instruction set

37 Affected by and affects:
Instruction Length Affected by and affects: Memory size Memory organization Bus structure CPU complexity CPU speed Trade off between powerful instruction repertoire and saving space

38 Allocation of Bits Number of addressing modes Number of operands Register versus memory Number of register sets Address range Address granularity

39 Pentium Instruction Format

40 In-class exercise Given the following memory values and a one-address machine with an accumulator, what values do the following instructions load into the accumulator? (Textbook p. 397, problems #11.1) Word 20 contains 40 Word 30 contains 50 Word 40 contains 60 Word 50 contains 70 LOAD IMMEDIATE 20 LOAD DIRECT 20 LOAD INDIRECT 20 LOAD IMMEDIATE 30 LOAD DIRECT 30 LOAD INDIRECT 30 20 40 30 50 60 70

41 In-class exercise Assume a stack-oriented processor that includes the stack operations PUSH and POP. Arithmetic operations automatically involve the top one or two stack elements. Begin with an empty stack. What stack elements remain after the following instructions are executed? (Textbook p. 398, problems #11.13) PUSH 4 PUSH 7 PUSH 8 ADD PUSH 10 SUB MUL


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