1. Kavita Bala CS 3410, Spring 2014 Computer Science Cornell University

2. PC imm memory target offset cmp control =? new pc memory d in d out addr register file inst extend +4 A single cycle processor alu

3. Binary Operations Number representations One-bit and four-bit adders Negative numbers and two’s complement Addition (two’s complement) Subtraction (two’s complement) Performance

4. Recall: binary Two symbols (base 2): true and false; 1 and 0 Basis of logic circuits and all digital computers How to represent numbers in binary (base 2)?

5. Know how to represent numbers in decimal (base 10) –E.g. 6 3 7 Other bases –Base 2 — Binary –Base 8 — Octal –Base 16 — Hexadecimal 10 2 10 1 10 0 1 0 0 1 1 1 1 1 0 1 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 0x 2 7 d 16 2 16 1 16 0 0o 1 1 7 5 8 3 8 2 8 1 8 0

6. 0123456789abcdef0123456789abcdef Dec (base 10) Bin (base 2) Oct (base 8) Hex (base 16) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18. 99 100 0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20 21 22. 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12. 0 1 10 11 100 101 110 111 1000 1001 1010 1011 1100 1101 1110 1111 1 0000 1 0001 1 0010.

7. 0123456789abcdef0123456789abcdef Dec (base 10) Bin (base 2) Oct (base 8) Hex (base 16) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18. 99 100 0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20 21 22. 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12. 0 1 10 11 100 101 110 111 1000 1001 1010 1011 1100 1101 1110 1111 1 0000 1 0001 1 0010. 0b 1111 1111 = 0b 1 0000 0000 = 0o 77 = 0o 100 = 0x ff = 0x 100 =

8. 0123456789abcdef0123456789abcdef Dec (base 10) Bin (base 2) Oct (base 8) Hex (base 16) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18. 99 100 0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20 21 22. 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12. 0 1 10 11 100 101 110 111 1000 1001 1010 1011 1100 1101 1110 1111 1 0000 1 0001 1 0010. 0b 1111 1111 = 255 0b 1 0000 0000 = 256 0o 77 = 63 0o 100 = 64 0x ff = 255 0x 100 = 256

9. How to convert a number between different bases? Base conversion via repetitive division Divide by base, write remainder, move left with quotient 637  8 = 79 remainder 5 79  8 = 9 remainder 7 9  8 = 1 remainder 1 1  8 = 0 remainder 1 637 = 0o 1175 lsb (least significant bit) msb (most significant bit) lsbmsb

10. Convert a base 10 number to a base 2 number Base conversion via repetitive division Divide by base, write remainder, move left with quotient 637  2 = 318 remainder 1 318  2 = 159 remainder 0 159  2 = 79 remainder 1 79  2 = 39 remainder 1 39  2 = 19 remainder 1 19  2 = 9 remainder 1 9  2 = 4 remainder 1 4  2 = 2 remainder 0 2  2 = 1 remainder 0 1  2 = 0 remainder 1 637 = 10 0111 1101 (can also be written as 0b10 0111 1101) lsb (least significant bit) msb (most significant bit) lsb msb

11. n bits: 0 to 2 n -1 E.g., 4 bits 0000 to 1111 is 0 to 15

12. Convert a base 2 number to base 8 (oct) or 16 (hex) Binary to Hexadecimal Convert each nibble (group of 4 bits) from binary to hex A nibble (4 bits) ranges in value from 0…15, which is one hex digit –Range: 0000…1111 (binary) => 0x0 …0xF (hex) => 0…f –E.g. 0b10 0111 1101 –0b10 = 0x2 –0b0111 = 0x7 –0b1101 = 0xd –Thus, 637 = 0x27d = 0b10 0111 1101 Similarly for base 2 to base 8

13. Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2) We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!)

14. Binary Arithmetic: Add and Subtract two binary numbers

15. Addition works the same way regardless of base Add the digits in each position Propagate the carry Unsigned binary addition is pretty easy Combine two bits at a time Along with a carry 183 + 254 001110 + 011100 How do we do arithmetic in binary? 1 437 1 11000 111 Carry-out Carry-in

16. Binary addition requires Add of two bits PLUS carry-in Also, carry-out if necessary

17. Half Adder Adds two 1-bit numbers Computes 1-bit result and 1-bit carry No carry-in A B S C out AB S 00 01 10 11

18. A B S AB S 0000 0101 1001 1110 S AB

19. A B S AB S 0000 0101 1001 1110 S AB

20. A B S C in C out Full Adder Adds three 1-bit numbers Computes 1-bit result and 1- bit carry Can be cascaded ABC in C out S 000 010 100 110 001 011 101 111

21. A B S C in C out ABC in C out S 00000 01001 10001 11010 00101 01110 10110 11111 Full Adder Adds three 1-bit numbers Computes 1-bit result and 1-bit carry Can be cascaded

22. A B S C in C out ABC in C out S 00000 01001 10001 11010 00101 01110 10110 11111

23. A B S C in C out ABC in C out S 00000 01001 10001 11010 00101 01110 10110 11111 AB S C in

24. A B S C out ABC in C out S 00000 01001 10001 11010 00101 01110 10110 11111 0010 0111 0 1 C in AB 0101 1010 00 01 11 10 0 1 C in AB C out S 00 01 11 10 Using Karnaugh maps

25. ABC in C out S 00000 01001 10001 11010 00101 01110 10110 11111

26. 4-Bit Full Adder Adds two 4-bit numbers and carry in Computes 4-bit result and carry out Can be cascaded A[4] B[4] S[4] C out C in

27. Adds two 4-bit numbers, along with carry-in Computes 4-bit result and carry out Carry-out = overflow indicates result does not fit in 4 bits A 0 B 0 S0S0 A 1 B 1 S1S1 A 2 B 2 S2S2 A 3 B 3 S3S3 C out C in 0 0 1 1 0 0 1 0 0 1 0 0 1 0 0

28. Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2) We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!) Adding two 1-bit numbers generalizes to adding two numbers of any size since 1-bit full adders can be cascaded

29. How do we subtract two binary numbers? Equivalent to adding with a negative number How do we represent negative numbers?

30. First Attempt: Sign/Magnitude Representation 1 bit for sign (0=positive, 1=negative) N-1 bits for magnitude Problem? Two zero’s: +0 different than -0 Complicated circuits Others attempts One’s complement IBM 7090 0111 = 7 1111 = -7 0000 = +0 1000 = -0

31. What is used: Two’s Complement Representation To negate any number: complement all the bits (i.e. flip all the bits) then add 1 Nonnegative numbers are represented as usual 0 = 0000, 1 = 0001, 3 = 0011, 7 = 0111 To negate any number: complement all the bits (i.e. flip all the bits) then add 1 -1: 1  0001  1110  1111 -3: 3  0011  1100  1101 -7: 7  0111  1000  1001 -0: 0  0000  1111  0000 (this is good, -0 = +0)

32. One more example. How do we represent -20? 20 = 0001 0100 20 = 1110 1011 +1 -20 = 1110 1100

33. Negatives (two’s complement: flip then add 1): flip = 1111 -0 = 0000 flip = 1110 -1 = 1111 flip = 1101 -2 = 1110 flip = 1100 -3 = 1101 flip = 1011 -4 = 1100 flip = 1010 -5 = 1011 flip = 1001 -6 = 1010 flip = 1000 -7 = 1001 flip = 0111 -8 = 1000 Non-negatives (as usual): +0 = 0000 +1 = 0001 +2 = 0010 +3 = 0011 +4 = 0100 +5 = 0101 +6 = 0110 +7 = 0111 +8 = 1000

34. Signed two’s complement Negative numbers have leading 1’s zero is unique: +0 = - 0 wraps from largest positive to largest negative N bits can be used to represent unsigned: range 0…2 N -1 –eg: 8 bits  0…255 signed (two’s complement): -(2 N-1 )…(2 N-1 - 1) –ex: 8 bits  (1000 000) … (0111 1111) –-128 … 127

35. Extending to larger size 1111 = -1 1111 1111 = -1 0111 = 7 0000 0111 = 7 Truncate to smaller size 0000 1111 = 15 BUT, 0000 1111 = 1111 = -1

36. Addition with two’s complement signed numbers Perform addition as usual, regardless of sign (it just works) Examples 1 + -1 = -3 + -1 = -7 + 3 = 7 + (-3) =

37. Addition with two’s complement signed numbers Perform addition as usual, regardless of sign (it just works) Examples 1 + -1 = 0001 + 1111 = 0000 (0) -3 + -1 = 1101 + 1111 = 1100 (-4) -7 + 3 = 1001 + 0011 = 1100 (-4) 7 + (-3) = 0111 + 1101 = 0100 (4) What is wrong with the following additions? 7 + 1, -7 + -3, -7 + -1 1000 overflow, 1 0110 overflow, 1000 fine

38. Why create a new circuit? Just use addition using two’s complement math How?

39. Two’s Complement Subtraction Subtraction is simply addition, where one of the operands has been negated –Negation is done by inverting all bits and adding one A – B = A + (-B) = A + ( B + 1) S0S0 S1S1 S2S2 S3S3 1 A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 C out 0 0 1 1 0 1 0 0 0 0 0 1 1 1 0 0

40. Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2). We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!). Adding two 1-bit numbers generalizes to adding two numbers of any size since 1-bit full adders can be cascaded. Using Two’s complement number representation simplifies adder Logic circuit design (0 is unique, easy to negate) Subtraction is simply adding, where one operand is negated (two’s complement; to negate just flip the bits and add 1)

41. In general, how do we detect and handle overflow?

42. When can overflow occur? adding a negative and a positive? adding two positives? adding two negatives?

43. When can overflow occur? adding a negative and a positive? –Overflow cannot occur (Why?) –Always subtract larger magnitude from smaller adding two positives? –Overflow can occur (Why?) –Precision: Add two positives, and get a negative number! adding two negatives? –Overflow can occur (Why?) –Precision: add two negatives, get a positive number! Rule of thumb: Overflow happens iff carry in to msb != carry out of msb

44. When can overflow occur? Rule of thumb: Overflow happened iff carry into msb != carry out of msb ABC in C out S 00000 00101 01001 01110 10001 10110 11010 11111 S MSB over flow A MSB B MSB C out_MSB C in_MSB MSB Wrong Sign Wrong Sign

45. Two’s Complement Adder with overflow detection A 0 B 0 S0S0 A 1 B 1 S1S1 A 2 B 2 S2S2 A 3 B 3 S3S3 over flow 0

46. Two’s Complement Subtraction with overflow detection S0S0 S1S1 S2S2 S3S3 over flow 1 A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3

47. Two’s Complement Adder with overflow detection S0S0 S1S1 S2S2 S3S3 over flow A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 mux 0=add 1=sub

48. Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2) We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!) Adding two 1-bit numbers generalizes to adding two numbers of any size since 1- bit full adders can be cascaded Using two’s complement number representation simplifies adder Logic circuit design (0 is unique, easy to negate). Subtraction is simply adding, where one operand is negated (two’s complement; to negate just flip the bits and add 1) Overflow if sign of operands A and B != sign of result S. Can detect overflow by testing C in != C out of the most significant bit (msb), which only occurs when previous statement is true

49. decoder 8 8 S 0=add 1=sub A B 8

50. adder mux decoder 8 8 8 8 8 S A B 8 0=add 1=sub

51. Is this design fast enough? Can we generalize to 32 bits? 64? more? A 0 B 0 S0S0 A 1 B 1 S1S1 A 2 B 2 S2S2 A 3 B 3 S3S3 C0C0

52. Speed of a circuit is affected by the number of gates in series (on the critical path or the deepest level of logic) combinatorial Logic t combinatorial inputs arrive outputs expected

53. A3A3 B3B3 S3S3 C4C4 A1A1 B1B1 S1S1 A2A2 B2B2 S2S2 A0A0 B0B0 C0C0 S0S0 C1C1 C2C2 C3C3 First full adder, 2 gate delay Second full adder, 2 gate delay … Carry ripples from lsb to msb

54. Binary Operations Number representations One-bit and four-bit adders Negative numbers and two’s complement Addition (two’s complement) Subtraction (two’s complement) Performance

55. We can now implement combinatorial logic circuits Design each block –Binary encoded numbers for compactness Decompose large circuit into manageable blocks –1-bit Half Adders, 1-bit Full Adders, n-bit Adders via cascaded 1-bit Full Adders,... Can implement circuits using NAND or NOR gates Can implement gates using use PMOS and NMOS- transistors Can add and subtract numbers (in two’s complement)! Next time, state and finite state machines…

56. Check online syllabus/schedule http://www.cs.cornell.edu/Courses/CS3410/2014sp/schedule.html Slides and Reading for lectures Office Hours Homework and Programming Assignments Schedule is subject to change