1. Example Snapshots From Some Of The Signal Integrity Interactive Software Modules The following slides highlight some of the output graphs/plots from the interactive Signal Integrity softwareThe following slides highlight some of the output graphs/plots from the interactive Signal Integrity software The software is highly interactive and allows the user to change many of the system variables in order to learn as much from the software as possibleThe software is highly interactive and allows the user to change many of the system variables in order to learn as much from the software as possible

2. Module 1 The Impact Of Propagation Delay And Drive Output Impedance On Signal Integrity For High-Impedance Loads

3. Module 2 Transmission Line Discontinuities With A Series Via And A Split Termination With A Capacitive Load

4. Module 3 Transmission Line Discontinuities With A Series Via, A Tapped Transmission Line, And A Split Termination With A Capacitive Load

5. Module 4 Transmission Line Equalization Using An RC Equalizer At The End Of The Line For Differential Transmission lines

6. Module 5 Near-End And Far-End Crosstalk

7. Module 6 Data-Dependent Timing Jitter Due To Closely Spaced Transmission Lines Within A Data Bus And Their Variable Impedances

8. Module 7 Pulse Transmission Through Optical Fibers

9. Module 8 Pre-emphasis And Its Impact On Signal Integrity For Very High Speed Signals

10. Module 10 Pre-emphasis And RC Equalization For Very High-Speed Signaling

11. Module 11 Data-Dependent Timing Jitter Due To Closely Spaced, Multidrop Broadcast Data Buses

12. Module 12 The Impact Of Signal Jumping From A Reference Ground Plane To A Different Reference Ground Plane

13. Module 13 The Impact Of Signal Jumping From A Reference Ground Plane To A Different Reference Ground Plane

14. Module 14 The Impact Of Signal Jumping From One Side Of A Ground Plane To The Other Side Of The Same Ground Plane On Signal Integrity

15. Module 15 The Impact Of Signal Jumping From A Ground Plane To A Power Plane On Signal Integrity

16. Module 16 The Impact Of Signal Jumping Between Multiple, Different Reference Planes On Signal Integrity

17. Module 20 Groundbounce and Powerbounce

18. Module 21 Characteristic Impedances For Various Transmission Line Structures Example Stripline * Output Plots And Tabular Results * Many other printed circuit board transmission line structures are discussed in this module.

19. Module 22 Transmission Line T-Junctions

20. Module 23 Routing A Signal Trace Over Rectangular Cutouts Within The Reference Plane Of The Return Current These results are from a 0.04 inch tall and 0.04 inch wide rectangular cutout. The dimensions of the cutout, as well as the number of cutouts, can be changed in the software.

21. Module 24 Coupled Microstriplines: Even And Odd Mode Signal Propagation How to interpret these tables is described in the software Impedance surface plots are used to extract 3-dimensional information

22. Module 25 Microstripline Dispersion

23. Module 26 Microstripline Losses The software describes how to interpret the surface plots.

24. Module 27 Right Angle Bends

25. Module 28 Steps in Microstripline Conductor Widths Time delays due to steps in the conductor width, as well as other considerations, are automatically calculated in the software.

26. Module 29 Losses For Coplanar Strip Transmission Lines How to interpret these tables and surface plots is described in the software.

27. Module 30 Far-End Crosstalk Design Guideline How to interpret the crosstalk plot is described in the software, and is used to define a region that does not exceed a given percentage maximum crosstalk.

28. Module 31 Far-End Crosstalk For Loosely Coupled and Tightly Coupled Differential Microstriplines Differential crosstalk results are displayed in tables and how to interpret these tables is described in the software.

29. Module 32 Dielectric Losses For Coplanar (Differential) Microstriplines Example Surface Plots Of Dielectric Loss Dielectric Loss Tables For Frequencies Up Through 10GHz For The Odd Mode Similar loss tables are shown for even mode signal propagation up through 10GHz. Design tables showing the propagation delays, as well as characteristic impedances for even and odd mode signal propagation are generated in this module.

30. Module 33 Determining The Impact Of Termination Resistor Location On Signal Integrity Example Input And Output Eye Patterns (Other Kinds Of Time-Domain Plots Are Generated In This Module)

31. Module 34 The Impact Of Propagation Delay And Driver Output Impedances On Signal Integrity For High-Impedance Loads And For TTL And CMOS Drivers Input and Output Bit Streams Input and Output Eye Patterns

32. Module 35 Selecting Resistor Values For The Split Termination For A Capacitive Load Graphical Analysis Results Show How To Select The Resistance Values

33. Driver Clock Signal Receiver 2 Clock Signal Module 36 Signal Integrity Of Low Impedance Clock Distribution Lines

34. Module 37 Parallel Clock Distribution Networks Example Received Clock Signals Clock Distribution Topology

35. Module 38 Determining The Impact Of Load Termination Resistor Location On Signal Integrity Example Pulse Responses Example Transmitted And Received Bit Streams

36. Module 39 Routing A Signal Over A Rectangular Cutout Within The Reference Plane Of The Return Current When A Stitching Capacitor Or A Nearby Reference Plane Is Available To Support The Return Current Stitching Capacitor And Nearby Reference Plane No Stitching Capacitor Or Nearby Reference Plane 2Gb/s Example Output Eye Patterns Generated With This Module