2. Variation-Tolerant Circuits: Circuit Solutions and Techniques Jim Tschanz, Keith Bowman, and Vivek De Microprocessor Technology Lab Intel Corporation, Hillsboro, Oregon

3. Outline Variations overview Process variations Process variations Impact of design choices Impact of design choices Voltage and temperature variations Voltage and temperature variations Circuit techniques Adaptive body bias Adaptive body bias Adaptive supply voltage Adaptive supply voltage Future trends & conclusion

4. Process Variations Sub-wavelength lithography Effect of process variations Functionality & Yield Performance Power

5. Design Impacts: Number of Paths Large number of critical paths → reduces mean frequency WID: 1 critical path 2 10 100 1000 10000 D2D

6. Design Impacts: Logic Depth Random dopant fluctuation: Number of dopant atoms Variation vs. depth Reducing logic depth increases impact of random variations

7. Effect of Within-Die Variations Model: Only WID Variations Model: Only D2D Variations Model: D2D & WID Variations D2D variations: impact variance WID variations: reduce the mean FMAX

8. Voltage and Temperature Variations Time (us) 2046 8 101214161820 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 Vcc Voltage droop core cache 70C 120C Thermal profile Variations are both static and dynamic Static: Tools required for prediction Dynamic: Design margining or adaptation techniques

9. Variation-Tolerant Design GATE SOURCE DRAIN Reduce EFFECTS of variation: post-silicon Clock tuning Clock tuning Adaptive body bias Adaptive body bias Adaptive supply voltage Adaptive supply voltage Reduce EFFECTS of variation: design Leakage-reduction techniques Leakage-reduction techniques Variation-tolerant circuits Variation-tolerant circuits Dynamic compensation circuits Dynamic compensation circuits Reduce SOURCE of variation Multi-Le and multi-Vt insertion Multi-Le and multi-Vt insertion Circuit styles and logic decisions Circuit styles and logic decisions Power delivery and thermal design Power delivery and thermal design

10. Adaptive Body Bias ABB Within-die ABB No body bias Leakage limit ABB reduces variation in FMAX WID-ABB: Moves ~100% of dies into highest frequency bin 11.075 Frequency Bin 100% Performance Yield 97% Highest Frequency Bin

11. Adaptive Supply Voltage Adaptive V DD + V BS is most effective

12. Dynamic Adaptation Dynamic body bias control Itanium® dynamic voltage/frequency Power distribution Before Foxton After Foxton S. Naffziger et. al, ISSCC 2005

13. Future Circuit Trends Variation-centric design Probabalistic timing and optimization Probabalistic timing and optimization Variation-tolerant circuit styles Variation-tolerant circuit styles Microarchitecture support Microarchitecture support Dynamic adaptation Reduce design margins required Reduce design margins required Supply voltage droops Supply voltage droops Temperature changes Temperature changes Reliability effects Reliability effects

14. Conclusion Impact of variations is increasing Aggressive feature size scaling Aggressive feature size scaling Increased die size and number of paths Increased die size and number of paths Design margins are increasing Design margins are increasing Variation-aware design needed Variation-tolerant circuits Variation-tolerant circuits Post-silicon tuning techniques Post-silicon tuning techniques Supported by device, circuit, and microarchitecture innovations Supported by device, circuit, and microarchitecture innovations