2. Introduction LNA Design figure of merits: operating power consumption, power gain, supply voltage level, noise figure, stability (Kf & B1f), linearity (1 dB compression point & IIP3) Class E switching PA Design figure of merits: Output power, efficiency, power control

3. Smith Chart for Impedance Matching The goal of impedance matching for maximum power transfer is to use R-L-C networks to move the load impedance from anywhere on smith chart to the origin at frequency of interest (usually is the resonant frequency f 0).

4. Bluetooth LNA Design: A Single-ended Inductively Source Degenerated Cascode Low Noise Amplifier

5. LNA Design Topology L s : Help generate a real resistive part of gate input impedance C gs_ext & L g : Input matching network L i : Resonant out capacitive parasitic effect between drain of M 1 and source of M 2, improve stablility L d : RF choke, also bandbass filter to resonant drain capacitance of M 2 and part of output impedance matching network

6. LNA Design Specifications

7. LNA Output Impedance Matching Network Design for Power Match Where: Vdd = 1 V Power Consumption = 1 mW M1 = M2 Ls = 0.5 nH Li = 0.26 nH

8. Power match vs Noise Match Input Match: Lg = 24.5 nH Cgs_ext = 100 fF Output Match: C0 = 3.09 pF L0 = 8.6 nH Cd = 869 fF Ld = 11.2 nH S-paramters: S11 = -43.1 dB S22 = -13.3 dB Gains: GA = 22.1 dB GP = 21.3 dB GT = 21.1 dB NF = 2.16 dB 1 dB Point = -30 dBm All at 2.45 GHz Input Match: Lg = 24 nH Cgs_ext = 113 fF Output Match: C0 = 3.1 pF L0 = 8.8 nH Cd = 856 fF Ld = 11.6 nH S-paramters: S11 = -15.1 dB S22 = -10.2 dB Gains: GA = 21.8 dB GP = 21.2 dB GT = 21.1 dB NF = 1.86 dB 1 dB Point = -31 dBm All at 2.45 GHz Fig. 6 S11 and S22 in smith chart for best power gainFig. 7 S11 and S22 in smith chart for improved NF

9. LNA Output Impedance Matching Network Design for Improving 1 dB Compression Point Where: Vdd = 1 V Power Consumption = 1 mW M1 = M2 Ls = 0.5 nH Li = 0.26 nH Fig. 8 LNA design topology for improved 1 dB compression point

10. Power Gain and Linearity Tradeoff Match to Improve 1 dB Compression Point Input Match: Lg = 25 nH Cgs_ext = 113 fF Output Match: C0 is removed L0 = 5.2 nH Cd = 975 fF Ld = 7 nH S-paramters: S11 = -21.4 dB S22 = -1.1 dB Gains: GA = 21.5 dB GP = 15.2 dB GT = 15.1 dB NF = 1.75 dB 1 dB Point = -9.86 dBm All at 2.45 GHz Match to Achieve Best Power Gain Input Match: Lg = 24.5 nH Cgs_ext = 100 fF Output Match: C0 = 3.09 pF L0 = 8.6 nH Cd = 869 fF Ld = 11.2 nH S-paramters: S11 = -43.1 dB S22 = -13.3 dB Gains: GA = 22.1 dB GP = 21.3 dB GT = 21.1 dB NF = 2.16 dB 1 dB Point = -30 dBm All at 2.45 GHz Fig. 9 S11 and S22 in smith chart for best power gain Fig. 10 S11 and S22 in smith chart for improved 1 dB Point

11. Final LNA Design Performance Summary

12. Bluetooth PA Design: A Single-ended Switching Class E Power Amplifier

13. Drain voltage and drain current waveforms to achieve 100 % efficiency Drain voltage and drain current constraints Solve circuit component values based on constraints Solved component values for the circuit Class E PA Topology and Equations Fig. 11 Class E PA topology Fig. 12 Ideal class E PA drain voltage and drain current waveforms

14. Class E PA Final Design Schematic Fig. 13 Class E PA final design schematic

15. Final Class E PA Design Waveforms at Drain and Load Fig. 14 Final class E PA design drain current and drain voltage waveforms Fig. 15 Final class E PA design load current and load voltage waveforms

16. Final Class E PA Design Performance Summary

17. Discussion and Conclusion LNA Cascode LNA needs to be tuned for the input and output ports of every single stage to improve stability and gain. Linearity improvements, for example higher DC supply voltage, to increase 1 dB compression point and input IP3 point. Differential LNA can be used to improve linearity while maintaining the same NF but at cost of higher power consumption. Multi-fingering gate layout technique and use small component values to reduce noise Class E PA Straightforward cookbook design approach to solve circuit component values. Efficiency is less sensitive to DC supply voltage level, power level control can be realized through changing DC supply voltage levels. Needs to pass the RF spectra mask to prove its compliance with system requirements. Differential PA improves driver stage stress

18. Future Work Load-Pull testing to find better input source and output load impedance to improve overall performance Linearity Improvement for LNA Pre-amplifier Driver Stage Design for Class E PA Linearization of Nonlinear Amplifier for Power Control PA Output Spectral and the Spectral Emission Mask Test RF Device Layout Techniques RF and Analog/Mixed Signal Device Package Note: The final design work measurements should be made directly from the die to validate the MOS PA and LNA performance

19. Acknowledgement I owe a debt of thanks to Dr. Sotoudeh hamedi-Hagh, who are my main advisor on this thesis paper. Full gratitude to co-advisor Dr. Robert H. Morelos, Dr. Tri Caohuu. Special thanks to Department Chair Dr. Ray Chen and Professor Udo Strasilla. Thank you all for your continuously guidance, support, kindness, and patience.