1. PMD 101 Frank Effenberger Huawei Technologies

2. Introduction Two issues involve the interaction of PMD speed and sensitivity –FEC link rate increase –Dual rate OLT receivers This presentation is meant to describe, in a simple way, the basic design of PMDs This should allow the membership to make educated judgments when choosing alternatives that impact speed/sensitivity

3. Photodetectors PIN diode –Responsivity (A/W) –Dark current (nA) –Intrinsic capacitance (pF) –Transit time (ps) APD –All the above, plus… –Gain () –Excess Noise Factor ()

4. Noise, and the first amplifier There are several noise sources –RIN noise (from the transmitter) –Shot noise (from signal and dark current) –Excess noise (from avalanche gain process) –Thermal noise (from the circuit itself) In PIN receivers, thermal noise dominates In APDs, shot and excess noise play a role The SNR out of the first amplifier tells the story in any (properly designed) circuit

5. Trans-Impedance Amplifier All modern optical PMDs use this topology The key idea is that the amplifier’s gain reduces the effective impedance as regards the speed of response Thus, a higher impedance value can be used (better SNR) while maintaining a high response speed (faster)

6. Circuit _ + Vout Vb Ip R A C B 2 = final LPF

7. Signal to Noise Ratio When thermal noise limited, –SNR ~ P s 2 R/B 2 ~ (P s /B 1 ) (P s /B 2 ) –For a fixed SNR: P s ~(B 1 B 2 ) 1/2 When shot noise limited, –SNR ~ P s /B 2 –For a fixed SNR: P s ~B 2

8. The dual-rate problem Signals come in at different rates OLT must either –Parallel process signal at both speeds (and decide later which was right), or –Serially process signals at one speed This decision has to do with choice of detector technology, and whether we are thermal noise limited or shot noise limited

9. Parallel PMD Circuit _ + Vb Ip R A C B 21 = 1 GHz LPF 1Gb/s Signal 10 Gb/s signal B 22 = 8 GHz LPF Thermal-limited: Shot-limited:

10. Serial PMD Circuit _ + Vb Ip R2 A C R1 Control signal Thermal-limited: Shot-limited: B 21 = 1 GHz LPF 1Gb/s Signal 10 Gb/s signal B 22 = 8 GHz LPF

11. Comparison of Serial and Parallel In shot-limited case, there is no difference –Pre-amp circuit does not impact SNR In thermal-limited case, the Parallel circuit 1G SNR is degraded by factor B 1 /B 12 = 8 –Constant SNR power penalty = 4.5 dB Practical APD receivers fall midway between these two extremes –Avalanche multiplication factor optimized around M=10

12. Optimized APD Gain

13. Serial and Parallel with optimized APDs For an optimized APD: –SNR~ P s 4/3 / (B 1 1/3 B 2 ) –For a fixed SNR: P s ~ (B 1 B 2 3 ) 1/4 The Parallel circuit 1G SNR is degraded by (B 1 /B 12 ) 1/3 = 2 –Constant SNR power penalty = 2.25 dB

14. Overall Conclusions Dual rate optics present us with a choice: Implement the ‘serial’ circuit approach –No sensitivity penalty –Complexity of transimpedance control Implement the ‘parallel’ circuit approach –Simpler transimpedance amplifier –Approximately 2~3 dB sensitivity penalty (APD) or 4.5dB penalty (pin)

15. Sensitivity versus Speed (FEC) For a normal receiver, B 1 =B 2 =B We can see that SNR=f(P/B) for a receiver with an optimized pre-amp So, a 0.28 dB increase in speed will require a 0.28 dB increase in received power for a constant SNR