1. SOC Virtual Prototyping: An Approach towards fast System- On-Chip Solution Date – 09 th April 2012 Mamta CHALANA Tech Leader ST Microelectronics Pvt. Ltd, Bangalore

2. 2 Agenda  Introduction of System On Chip  System On Chip Design Flow  What is Virtual prototype ?  TLM Methodology  What is SystemC ?  Image Co-Processor Architecture  Image Signal Processor TLM Platform  What is TLMdevice?  Dataflow of the TLM platform  TLMdevice demonstrator  TLMdevice Benefits  Results & Conclusions  Thanks

3. Introduction : System On Chip  How does a system-on-chip like today? 3 Processor with Embedded SW Interconnect Bus Interconnect Bus Memory Peripherals

4. System Development Virtual Prototype Time To Market saved System On Chip Design Flow Early system integration Bottlenecks: Explosive Complexities Cost Time to market Pressure Bottlenecks: Explosive Complexities Cost Time to market Pressure Solution: Raise the level of abstraction for system level design Support HW/SW co- development Solution: Raise the level of abstraction for system level design Support HW/SW co- development Benefits of V.P.: Better Time to Market Quality Confidence Communication Point Reference Simulation Benefits of V.P.: Better Time to Market Quality Confidence Communication Point Reference Simulation TLM or Virtual Prototype fulfills both conditions as the ideal solution

5. TLM Methodology  It is the single IP/SOC executable reference model that allows:  Rationalized modeling effort  Consistent development  Cross-team communication 5 TLM Functional Models Timed Models Functional Embedded Software Functional Verification Co-simulation Architecture Analysis Embedded Software Optimization

6. What is SystemC  SystemC is a modeling platform  A set of C++ class library  C++ extensions to add hardware modeling constructs  Simulation Kernel  Supports different levels of abstraction like High Level Functional Models, Loosely Timed Model, Approximate Timed Models, Timed Models, Cycle Accurate models  Models developed in SystemC can act as unique reference model for all teams in product design phase 6

7. Image Co-Processor Architecture 7 MicroProcessor (Firmware) RAW Bayer Data Stats Gathering Image Processing Pipe (hardware) Sensor Control YUV or RGB The task of the Image Co-Processor is to process the data from the sensor into a good quality image conforming to a standard format (YUV or RGB)

8. Image Signal Processor TLM Platform 8

9. What is TLMdevice? Way to Connect TLM Simulations with real hardware devices like UART, Display and Sensors. Set Of Libraries. Server-Client Methodology. Connection is based on socket communication. TLMdevice servers can be located anywhere on the network. Drivers are needed to configure sensor, capture the image from sensor and provide it to the SystemC TLM model. Data can be easily sent and received to/from during TLM simulation run. The only tools required to develop such TLM IPs are the free-of- charge open source SystemC 2.0 kernel, C++, GNU compiler & gdb debugger. 9

10. Dataflow of the platform 10 TLMdevice_Sens or Server On Windows MFC- Test App 1 ‘C’ API I/F TLM- device DLL 2 ‘C’ API I/F Imaging TLM Platform TLMdevice_I2C Client on Linux IPC I2C Master I/F Interfaces with the Sensor Board TLMdevice_RX Client on Linux IPC RX I/F I/F sending final RGB/YUV image file 2 CMOS Sensor Connected with USB Port of PC I2C TLM IP RX TLM IP

11. Dataflow of the platform 11 TLMde vice_GDD_RG B Server On Solaris Imaging TLM Platform TLMdevice_G DD_RGB/YUV Client On Linux IPC Image sent to the display application GDD Frame TLMdevice_G DD_RGB/YUV Server On Windows O/P TLM IP

12. TLMdevice demonstrator

13. TLMdevice Benefits In our Imaging Framework TLM Models were interfaced with the SMIA complaint CMOS sensor using USB interface. TLM Model was able to process live streamed images from sensor. Firmware team appreciated this virtual platform because of its integration with real CMOS sensor and speed. 13

14. Results & Conclusions Significant Time Gain in Product Tape-out. Successfully validated firmware algorithms like auto white balance, auto exposure with real sensor streamed images much before availability of chip. Up-to 2 fps frame-rate achieved. Relying on TLMdevice server-client approach, enables servers to be located anywhere on the network. Easy Integration of ISS debugger made debugging easy and powerful. 14 SystemC Transaction level models play a key role in different phases of SOC design cycle like architecture models, golden reference models for functional verification, early availability to act as Virtual Prototype for image quality analysis and close loop validations. Conclusion

15. Thanks Mamta CHALANA (mamta.chalana@st.com) Tech Leader ST Microelectronics Pvt. Ltd Bangalore 15