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New England Lead Free Electronics Consortium
Greg Morose Toxics Use Reduction Institute University of Massachusetts Lowell
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Agenda Consortium Overview Phase III Process
Phase III Results and Conclusions Next Steps
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Lead-free Electronics Challenges
1. Which lead-free solders? 2. What process modifications? 3. Which component finishes? 4. Which board finishes?
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New England Lead-free Electronics Consortium
Academia Government Pull testing Statistical analysis Funding Project Mngmt. Outreach Industry Components Equipment Technical expertise
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Consortium: Previous Work
Phase I: 66 test vehicles Type 1: 4” x 5.5” FR-4 board, single layer, single sided, SMT only (Assembly Class B)
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Phase I – Parameters Solder Alloys Sn/Ag/Cu(95.5/3.8/0.7)
Sn/Bi (57/43) PWB Surface Finishes OSP (Organic Solder Protectants) Electroless Nickel Immersion Gold (ENIG) Thermal Profiles Soak with 60sec, 90sec, 120sec above liquidus Linear with 60sec, 90sec, 120sec above liquidus temp. Reflow Environment Nitrogen vs. Air reflow
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Consortium: Previous Work
Phase II: 100 test vehicles Type 1: 6” x 9” board, single layer, single sided, SMT only (Assembly Class B)
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Phase II – Parameters PWB Finishes – Solder Mask Over Bare Copper with Hot Air Solder Leveling (SMOBC/HASL), Matte Tin (Sn), Immersion Silver (Ag), Organic Solder Preservative (OSP), and Electroless Nickel Immersion Gold (ENIG). Reflow Atmospheres – Two Treatments – Air and Nitrogen. Solder Pastes – 95.5Sn-3.8 Ag-0.7Cu alloy from three different suppliers (A, B and C), all incorporating no-clean fluxes. 4. Component Lead Finishes – matte tin, tin/silver/copper, nickel/palladium/gold, and nickel/gold. Sn-Pb eutectic solder PWB using the solder treatments as control PWBs.
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Phase III Implementation not experimentation, test vehicle simulates production board Focus on solder joint integrity Funding: U.S. EPA
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Problem Solving Approach
Our Outputs (Y’s) are determined by our Inputs (X’s). If we know enough about our X’s we can accurately predict Y. ) x ,..., , f(x = Y k 3 2 1 Solder joint integrity = (reflow profile, solder paste, print speed, surface finish, component finish, laminate material, etc.) Y1: Defects per unit (attribute data) Y2: Solder joint pull strength (continuous data) By
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Critical Inputs SAC 305 Alloys: Multiple Atmosphere: air, nitrogen Air
Thermal profile: soak, ramp/peak Ramp/peak Solder supplier: Multiple 2 suppliers Laminate material: Multiple 2 laminates Surface finish: Multiple 3 finishes
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New England Lead-free Consortium – Phase III
Reliability Testing Board fab Visual testing Process Equipment Components Solder Paste Design Manufacturing
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Phase III Process
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Phase III Test Vehicle Board Quantity: 40 Board Layers: 20
Board Thickness: 0.110” Board Size: 16” x 18” Laminate Materials: Supplier A Supplier B
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Phase III Components Component Types:
SMT (Qty: 1,713): BGAs, uBGAs, SOICs, resistors, capacitors, QFPs, etc. THT (Qty: 53): Connectors, resistors, relays, inductors, etc. Component Lead Finishes: matte Sn NiAu SnNi SnAgCu SnBi SnPb NiPdAu Sn Au PdAg SnCu
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Phase III Parameters Surface Finishes:
Electroless nickel immersion gold (ENIG) Immersion Silver Organic solder protectants (OSP) Solder paste: Lead free SAC 305 no clean (Supplier A, Supplier B) Tin/Lead (Supplier A, Supplier B)
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Phase III Stencil Material: Stainless steel laser cut and electropolished Thickness: 6 mils (step down to 5 mils for uBGAs) Top Stencil Apertures: 10% standard reduction Bottom Stencil Apertures:: For leaded devices – 10% expansion in length for both directions and a 1 to 1 ratio for width For fine pitch devices – based on pad size For discretes – 10% increase in length on termination side only, and a 1 to 1 ratio for width Aperture Styles: For discretes – radial aperture, home plate, kings crown, and standard
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DOE 1 – Lead-free Boards Board Solder Paste Surface Finish
PWB Laminate Components Testing 1 LF - A ENIG Laminate - A SMT, THT HALT 2 SMT TC 3 Laminate - B 4 5 Imm. Ag 6 7 8 9 OSP 10 11 12
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DOE 1 – Lead-free Boards Board Solder Paste Surface Finish
PWB Laminate Components Testing 13 LF - B ENIG Laminate - A SMT, THT HALT 14 SMT TC 15 Laminate - B 16 17 Imm. Ag 18 19 20 21 OSP 22 23 24
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DOE 2 – Tin/Lead Boards Board Solder Paste Surface Finish PWB Laminate
Components Testing 25 SnPb - A ENIG Laminate - B SMT, THT HALT 26 SMT TC 27 SnPb - B 28 29 Imm. Ag 30 31 32 33 OSP 34 35 36
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Phase III Overall Process
Board Fabrication, IST Board Design Assembly Thermal Cycling & HALT AOI, Visual, and X-Ray Inspection Pull & Shear Test
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IST Preconditioning Profile (260 C)
Location: Dynamic Details Inc. Sterling, Virginia 6 test coupons: 3 Thermal Excursions 6 test coupons: 6 Thermal Excursions
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IST Temperature Profile (150 C)
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Assembly Process Universal Placement Machine 4791 HSP
Machine GSM DEK Horizon 265 Screen Printer Vitronics Soltec XPM 1030 Omron Inspection System Premier Rework RW116
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Printing Process Blades: 19 inch stainless steel, 9 mils
Separation Speed: inches/second for all boards Blade pressure: 30 lbs for all boards Print Speed: Lead Boards: 0.8 inches/second for all boards Lead-free Boards: 2.0 inches/second for first five boards (bottom only), 1.5 inches/second for all remaining boards
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Placement Process Universal Placement Machine 4791 HSP:
High speed placement of discretes (resistors and capacitors) Universal Placement Machine GSM: Placement of other SMT components (SOIC, BGA, uBGA, QFP, etc.)
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Reflow Process Reflow Oven: Vitronics Soltec XPM 1030
Reflow Atmosphere: Air only Software: Datapaq Heating Zones: 10 Cooling Zones: 3 Line Speed: 25.0 in/min Profile: Ramp to Peak
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Reflow Process Target Maximum Temperature: Lead: 208 – 218 degrees C
Lead-free: 240 – 248 degrees C Target TAL: Lead: 60 – 90 seconds Lead-free: 60 – 90 seconds
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THT Process Change Nozzle Tape Flux Insert Preheat Solder Tape
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THT Process Parameter Lead Boards Lead-free Boards Alloy Tin/Lead
SAC 305 Flux Alpha 3215 Preheat Temperature 110 degrees C Solder pot temperature 260 degrees C 280 degrees C Dwell time 12 seconds 12 – 20 seconds
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Visual Inspection Location: Hudson, NH, Benchmark Electronics Method:
Seven experienced and trained inspectors Review AOI Results for false/true calls Magnification: 10x Standard: IPC 610D, Class 2 Identify defects/process indicators
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Thermal Cycling Location: Andover, MA, Raytheon Method:
Meet the requirements of IPC-9701, test condition TC1 2,000 Cycles Cycle Time: Approx. 40 minutes per cycle - Ramp rate: 10 degrees C per minute - 10 minute dwell time at 0 C - 10 minute dwell time at 100 C Equipment: Thermotron F125 CHV37-30
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Thermal Cycling Temperature Time Upper dwell time = 10 minutes
T (max) = 100 C Ramp rate = 10 C/ minute Temperature T (min) = 0 C Time Lower dwell time = 10 minutes
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Highly Accelerated Life Testing (HALT)
Location: North Reading, MA, Teradyne Method: Temperature Cycling: -60 degrees C to 160 degrees C Vibration: Static to 80 Grms Dynamic measurement of resistance: 17 daisy chains Single test cycle: 206 minutes Equipment: Qualmark HALT/HASS System
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HALT Profile
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Pull Testing Location: Lowell, MA, University of Massachusetts Method:
45 degree angle to get vertical and shear stress Pull rate of 0.1” per minute, record the peak pull force Equipment: Instron pull test machine
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Pull Testing
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Results & Conclusions
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IST Results Material Finish Precondition Cycles P/F Cycle Failure
Occurred No. Of IST Cycles A ENIG 3x P 500 OSP F Cycle 3 Ag 6x Cycle 5 B 29 Cycle 1
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Visual Inspection Description Tin/Lead PWBs Lead-free PWBs
209: Bent pin Y 261: Tombstone 602: Solder bridge 615/616: Non-wetting 626: Disturbed solder 713: Foreign matter 606: Pinholes, blowholes 613: Insufficient solder 672: Solder balls 205: Misregistration 270: Raised part 603: Solder splatter 612: Excess solder 620: Unsoldered lead 701: Delamination 770: Damaged pad
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Total Components Total Defects Components Per Board
Lead-free (24 Boards) Tin/Lead (12 Boards) Totals SMT 1,713 41,112 20,556 61,668 THT 53 636 318 954 1,766 41,748 20,874 62,622 Total Defects Lead-free 24 Boards (x2 inspections) Tin/Lead 12 Boards Totals SMT 377 349 726 THT 246 21 267 623 370 993
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Defects Per Unit (Board)
Lead-free (24 Boards) Tin/Lead (12 Boards) Totals SMT 7.8 14.5 10.1 THT 10.2 1.7 7.4 Defects Per Unit (Component) Lead-free (24 Boards) Tin/Lead (12 Boards) Totals SMT 0.005 0.008 0.006 THT 0.193 0.033 0.144
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Visual Inspection Summary
DOE 1 - Lead-free Boards: For THT components, there is no statistical difference for solder paste supplier, surface finish, or laminate material supplier. For SMT components, there is borderline statistical difference for solder paste supplier and laminate supplier. There is no statistical difference for surface finish. There is a statistical difference for the interaction of solder paste supplier and laminate material supplier for SMT components. Best SMT Combination: Laminate “Z”, ENIG, either paste
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Visual Inspection Summary
DOE 2 - Tin/Lead Boards: There is no statistical difference for solder paste supplier, surface finish, or interaction effects for SMT or THT components. (Probability is > 0.05 for all of these factors)
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Lead-free vs. Tin/Lead SMT Defects
No statistical difference for SMT component defects (P > 0.05) Mean: 7.9 Mean: 14.5
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Lead-free vs. Tin/Lead THT Defects
Statistical Difference, Lead-free has more THT defects (P < 0.05) Mean: 10.2 Mean: 1.7
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Defect Rate (Lead-free solder paste) (Tin/Lead solder paste)
Component Finish - SMT Component Finish Component Type Number of Components Defect Rate (Lead-free solder paste) Defect Rate (Tin/Lead solder paste) Tin/copper SMT 144 0% Tin/bismuth 432 0.3% Tin 59,076 0.8% Gold 108 1.4% Tin/lead 468 2.1% Nickel/palladium/gold 612 3.1% 1.0% Matte tin 324 5.1% 8.3% Nickel/gold 240 9.1% 18.7% Tin/silver/copper 168 13.5% 4.2% Palladium/silver 36 16.7%
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Defect Rate (Lead-free solder paste) (Tin/Lead solder paste)
Component Finish - THT Component Finish Component Type Number of Components Defect Rate (Lead-free solder paste) Defect Rate (Tin/Lead solder paste) Tin THT 576 15.1% 1.8% Other lead-free 198 15.5% 2.3% Tin/copper 54 17.4% 5.6% Nickel/palladium/gold 36 20.8% 0% Tin/nickel 90 46.7% 15%
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Pull Testing Results Lead-free DOE
No statistical difference for solder paste supplier, board finish, or laminate There is a statistical difference for lead finish/SOIC and pull direction.
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Pull Testing Results Lead-free versus Tin/Lead Results Mean
Source Probability Solder Paste (TL/LF) No statistical difference for solder paste type (lead-free or tin/lead), Probability > 0.05
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Conclusions With careful selection of materials, lead-free electronics assembly is possible with equal or fewer defects than tin/lead assembly for SMT components Further process optimization is required for THT component assembly After thermal cycling, solder joint strength for lead-free electronics assembly is comparable to tin/lead assembly
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Next Steps Further inspection and X-ray of HALT boards
Electrical testing of certain components Further testing and optimization for THT components Vitronics selective solder machine, Phase III boards & components, Dwell time, solder pot temperature, flux, etc. Develop a Failure Modes and Effect Analysis (FMEA) Potential failure modes, severity of effect, probability of occurrence, detection capability, and recommended mitigation actions
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Multiwave Technology
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Select Wave Technology
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What is the Effect on the Outputs?
FMEA Overview How Bad? How Often? How well? What is the Effect on the Outputs? What can go wrong with the Input? What is the Input How can these be found or prevented? What are the Causes? What can be done?
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Risk Priority Number Severity (of Effect)- importance of effect on customer requirements, safety or other risks of failure occurring (1=Not Severe, 10=Very Severe) Occurrence (of Cause)- frequency with which a given cause or failure occurs (1=Not Likely, 10=Very Likely) Detection (capability of Current Controls) - ability of current control system to detect or prevent causes or failures (1=Likely to Detect, 10=Never able to Detect) Effects Causes Controls RPN = Severity X Occurrence X Detection
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Consortium Information
For further information about the consortium, please contact: Greg Morose Toxics Use Reduction Institute (978) Or visit our website:
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