1. In1210/01-PDS 1 TU-Delft Instructions and addressing

2. In1210/01-PDS 2 TU-Delft Computer System READ(X) READ(Y) ADD(X,Y,Z) WRITE(Z) X: 1 Y: 2 Z: 3 IR: PC: arithmetic unit Central Processing Unit control unit Main Memory Input Output registers data and instructions

3. In1210/01-PDS 3 TU-Delft Instruction and wordlengths(1) instruction 0 1 2 3 4 5 6 7 8 9 10 word instruction instruction 0 1 2 3 4 5 6 7 8 9 10 word address

4. In1210/01-PDS 4 TU-Delft Instruction and wordlengths(2) instruction instruction 0 1 2 3 4 5 6 7 8 9 10 word address instruction instruction

5. In1210/01-PDS 5 TU-Delft Instruction and wordlengths(3) 0 1 2 3 4 5 6 7 8 9 10 word address instruction instr. instr instruction instr. instr instruction instr. instr instruction instr. instr instruction instr. instr instruction instr. instr

6. In1210/01-PDS 6 TU-Delft 32 bit word formats opcode specifier operand specifiers 31 30 1 0 byte byte byte byte a two’s complement number 4 ASCII characters 32 bit a machine instruction

7. In1210/01-PDS 7 TU-Delft Byte formats 0123 4567 89-- ---- ---- 0 2 1 word Big endian e.g. PowerPC 68000 3210 7654 --98 ---- ---- 0 2 1 Little endian

8. In1210/01-PDS 8 TU-Delft Question l What problems can occur in porting data between machines with big-endian and little- endian storage?

9. In1210/01-PDS 9 TU-Delft Type of Instructions l There are 4 types of instructions -Data Copy operations »between memory and registers »between memory locations »between registers -Arithmetic and Logic operations -Program flow control -I/O operations

10. In1210/01-PDS 10 TU-Delft Symbolic notation l Copy instructions [ R 1 ]  M( LOC ) l Arithmetic operations M( C )  M( A ) + M( B ) LOC, A, and B are memory addresses l M(address) means contents of memory location at address. [ R ] means contents of register R.

11. In1210/01-PDS 11 TU-Delft Operand specification formats l Three address instructions format: INSTR source#1,source#2,destination example: Add A,B,C means: M( C )  M( B ) + M( A ) l Two address instructions format: INSTR source, destination example: Add A,B means: M( B )  M( B ) + M( A )

12. In1210/01-PDS 12 TU-Delft Two address instruction l Two operand instructions destroy contents of the B location l Need other instruction to avoid that; Move B,C l We then have Move B,C Add A,C meaning: M( C )  M( B ); M( C )  M( C ) + M( A ) ;

13. In1210/01-PDS 13 TU-Delft One address instructions l One address have implicit source (often called Accumulator) Load A Add A Store C meaning [Accu]  M( A ); [Accu]  [Accu] + M( A ); M( C )  [Accu]

14. In1210/01-PDS 14 TU-Delft Registers l Many computers have a number of General- Purpose registers inside the CPU l Access to registers is faster than to memory locations l Used to store temporary data during processing l Registers require less bits of address than main memory

15. In1210/01-PDS 15 TU-Delft Register addressing l Let Ri denote register General operation ADD A,B,C can be broken down to Move A,R0 Add B,R0 Store R0,C meaning [ R0 ]  M( A ); [ R0 ]  [ R0 ] + M( B ); M( C )  [ R0 ]

16. In1210/01-PDS 16 TU-Delft Instruction formats (1) opcode specifier operand specifiers general format opcode operand one operand addressing

17. In1210/01-PDS 17 TU-Delft Instruction formats (2) opcode operand operand two operand addressing

18. In1210/01-PDS 18 TU-Delft Accumulator architecture Accumulator PC CPU Main Memory

19. In1210/01-PDS 19 TU-Delft Question How many instructions can be defined when the opcode field is 5 bit ?

20. In1210/01-PDS 20 TU-Delft Example instruction accu 4 bits 12 bits opcode operand m 15 0 sign bit

21. In1210/01-PDS 21 TU-Delft Instruction set

22. In1210/01-PDS 22 TU-Delft Multiple register architecture R0 CPU Main Memory R1 R2 R3

23. In1210/01-PDS 23 TU-Delft Straight-line sequencing …... ……. Move A,R0 Add B,R0 Move R0,C i i+4 i+8 A B C address Program for M( C )  M( B ) + M( A )

24. In1210/01-PDS 24 TU-Delft Straight-line sequencing Add Nn,R0 Move R0,S Move N1,R0 Add N2,R0 Add N3,R0 i i+4 i+8 i+4n-4 i+4n address Program for addition of n numbers

25. In1210/01-PDS 25 TU-Delft Branching...... n Clear R0 Move N,R1 Decr R1 Branch>0 L Move R0,S L S N N1 Nn Program for addition of n numbers Determine address of “next” number and add it to R0 program loop

26. In1210/01-PDS 26 TU-Delft Common branch conditions l N (negative) set to 1 of result is negative l Z (zero) set to 1 of result is zero l V (overflow) set to 1 of result overflows l C (carry) set to 1 of carry-out results

27. In1210/01-PDS 27 TU-Delft Question Why is the carry condition important?

28. In1210/01-PDS 28 TU-Delft Addressing modes l Addressing modes determine how the address of operands is determined l Typical 4 addressing modes -immediate addressing -direct addressing -indirect addressing -index addressing

29. In1210/01-PDS 29 TU-Delft Immediate addressing(1) opcode specifier operand instruction ADD # -1 JNZ 10 10 example: simple counting loop

30. In1210/01-PDS 30 TU-Delft Immediate addressing(2) l Advantages: -no additional calculations needed to obtain operand -fast l Disadvantages: -Operand value must be known -Operand value cannot be changed -Limited no of bits available Notation: MOVE #200,R0 Meaning: [ R0 ]  200

31. In1210/01-PDS 31 TU-Delft Direct addressing(1) opcode specifier mem or reg address instruction memory or registers ADD 13 JNZ 10 # -1 10 13

32. In1210/01-PDS 32 TU-Delft Direct addressing(2) l Advantages: -Operand separate from instruction -Can be changed -Full word length available l Disadvantages: -More memory accesses -More storage occupation Notation: ADD R1,R2 Meaning: [ R2 ]  [ R2 ] +[ R1 ] l Also called “Absolute addressing” (Ham.)

33. In1210/01-PDS 33 TU-Delft Indirect addressing(1) ADD (12) JNZ 10 13 # -1 10 13 opcode specifier mem or reg address instruction op. address operand memory or registers

34. In1210/01-PDS 34 TU-Delft Indirect addressing(2) l Advantages: -Actual address of operand is not in instruction -Can be changed l Disadvantages: -Even more memory or register references -More memory occupation Notation: ADD (R1),R2 Meaning: [ R2 ]  [ R2 ] + M([ R1 ])

35. In1210/01-PDS 35 TU-Delft Example indirect addressing program loop L N N1 Clear R0 Move N,R1 Move #N1,R2 Add (R2),R0 Add #4,R2 Decr R1 Branch>0 L Move R0,S n S

36. In1210/01-PDS 36 TU-Delft Index addressing(1) opcode Reg index instruction operand memory or registers operand + registers

37. In1210/01-PDS 37 TU-Delft Index addressing(2) l Advantages: -Allows specification of fixed offset to operand address l Disadvantages: -Extra addition to operand address Notation: ADD X(R1),R3 (X=number) Meaning: [ R3 ]  [ R3 ] + M([ R1 ] + X )

38. In1210/01-PDS 38 TU-Delft Example index addressing NENE Program with index addressing program loop sex age salary n Empoyee ID sex age salary Empoyee ID L Move #E,R0 Move N,R1 Clear R2 Add 8(R0),R2 Add #16,R0 Decrement R1 Branch>0 L Div R1,R2 Move R2,Sum Move N,R1

39. In1210/01-PDS 39 TU-Delft Additional modes l Some computers have auto-increment (decrement instructions) Example: (R0)+ Meaning..M( R0 )..; [ R0 ]  [ R0 ]+1 Example: - (R0) Meaning [ R0 ]  [ R0 ]-1;..M( R0 )..