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Copyright © 2015 Curt Hill Make An Indispensable Developer’s Tool
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Introduction Make is the name of a “scripting language” interpreter –Designed specifically for compiling and linking a programming project Originally a UNIX program Has escaped the UNIX ecosystem and is now everywhere Refers to any of a set of programs that do approximately the same thing Every IDE either uses an existing make or has a custom one Copyright © 2015 Curt Hill
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Components There are typically two –The program itself –The script file that describes the executable build process This often has the name make or makefile With or without an extension Copyright © 2015 Curt Hill
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Process Making a project is a matter of checking dependencies and dates A dependency exists when one file depends upon another Thus the executable usually depends upon object files –Object files depend upon source files If an item is older than what it depends upon it must be rebuilt Copyright © 2015 Curt Hill
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Example Suppose x.exe depends upon x.obj, date.obj and classy.obj When make is executed it finds that x.exe is newer than data.obj and x.obj but older than classy.obj It now knows that it must re-link x.exe so as to incorporate the new class.obj It does the same process for obj files that depend on source files –Thus it only compiles and/or links what is out of date Copyright © 2015 Curt Hill
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Statement Types Comments – not really a statement Assignments Directives Implicit rules Explicit rules Copyright © 2015 Curt Hill
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Syntax Comments are indicated by an octothorp (#) –These are ignored –Standard UNIX scripting practice Assignment statement has a mostly standard format –Variable = expression –The expression does not necessarily look like a C style expression –Often files separated by blanks Copyright © 2015 Curt Hill
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Explicit Rules General form is two lines target: dependencies [tab] system commands Targets are typically executables or object files –Other things possible The dependencies are one or more files that the target needs to be built The command is how to accomplish it Copyright © 2015 Curt Hill
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Explicit Rules Again The usual form is target as a file: xyz.o: xyz.cpp classy.h [tab] gcc –c xyz.cpp If either classy.h or xyz.cpp is newer than xyz.o or if xyz.o does not exist then gcc with the c option is run on xyz.cpp Copyright © 2015 Curt Hill
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Target Usually the target is a file like that previously shown Does not have to be a real file We could do something like: all: xyz.cpp classy.cpp [tab]gcc xyz.cpp classy.cpp The normal execution of gcc will produce xyz.exe not all or all.exe Copyright © 2015 Curt Hill
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The $ The $ function is an inclusion of variable’s value Form: $(variable) Thus if we have: CPP = g++.exe Then we later see: $(CPP) -c ggapp.cpp This becomes the command line: g++.exe -c ggapp.cpp We can now easily change compilers or set options Copyright © 2015 Curt Hill
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Example: This is from a DevC++ make file Create ggFrm.o Objects/MingW/ggFrm.o: $(GLOBALDEPS) ggFrm.cpp ggFrm.h date.h $(CPP) -c ggFrm.cpp –o Objects/MingW/ggFrm.o $(CXXFLAGS) Copyright © 2015 Curt Hill
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Implicit Rules Also known as inference rules This keeps us from explicitly specifying all the rules explicitly Usually involve a wildcard character % Consider the following implicit rule: %.obj : %.cpp [tab] $(CPP) –c $(.SOURCE) This says: whenever you need an object file, such as x.obj, then do a gcc –c x.cpp Copyright © 2015 Curt Hill
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Directives If statements that allow some alternatives The keywords are if, else, elif, endif –Sometimes these are prefixed by a % or ! in various derivatives This allows us to parameterize a makefile Copyright © 2015 Curt Hill
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Example: if $(CC) == bcc LDFLAGS = /Lf:\bc\lib elif $(CC) == cl LDFLAGS = /Lf:\c6\lib; else abort endif Copyright © 2015 Curt Hill
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Languages Do not be confused, the C family is not the only language processing that can occur Many C/C++ projects have one or more subroutines in assembly –FORTRAN numerical routines are also common Most GUIs in Windows have a source file, often a.rc, that compiles into a.res file –Wxforms compile eventually into.res Copyright © 2015 Curt Hill
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DevC++ Uses a rather normal UNIX style make The script is in: makefile.win –Even in a console program Program itself is: …\MinGW32\bin\mingw32-make.exe The project file is not the make file –It looks like a UNIX initialization file Copyright © 2015 Curt Hill
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Alternatives There is no compelling reason why a system has to follow the UNIX pattern for a make file Eclipse merely compiles all Java files in the projects directory Visual Studio has a proprietary (and hidden) make process Borland/CodeGear/Embarcadero used a variant of UNIX make up through version 6 and then switched to an XML format Copyright © 2015 Curt Hill
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References Here are some web references for more information: http://mrbook.org/blog/tutorials/make/ http://www.cs.colby.edu/maxwell/cour ses/tutorials/maketutor/http://www.cs.colby.edu/maxwell/cour ses/tutorials/maketutor/ http://www.cs.swarthmore.edu/~newh all/unixhelp/howto_makefiles.htmlhttp://www.cs.swarthmore.edu/~newh all/unixhelp/howto_makefiles.html http://www.opussoftware.com/tutorial/ TutMakefile.htmhttp://www.opussoftware.com/tutorial/ TutMakefile.htm Copyright © 2015 Curt Hill
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Finally We should browse through a make file or two Inher_demo has several classes including an inheritance hierarchy Projects\p2c\src\make is a standard UNIX make Copyright © 2015 Curt Hill
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