1. ECE 511: Digital System & Microprocessor
I/O Interfacing
ECE 511: Digital System & Microprocessor

2. What we are going to learn in this session:
M68230 Parallel Interface Timer.
Registers in the M68230.
Port initialization method.
How M68230 interfaces with various devices.
Delay subroutine.

3. The M6230 Parallel Interface/Timer

4. M68230 Parallel Interface/Timer
Used by M68000 to communicate with external devices.
Parallel data transfer.
Has three ports:
Port A, Port B, Port C.
Each port is 8-bits long.
Ports connect to devices.
Ports need to be initialized before used.

5. M68230 Interfacing Memory M68k MAD (LED, Switches, Motor,
CS*
MAD
(LED, Switches, Motor,
7-Segment, Keypad, etc.)
M68230
CS*
CS*
Port A
Device #1
Data Bus
Port B
Device #2
Port C
Device #3

6. (Register select pins)
How M68230 connects to M68k
D0-D7
D0-D7
PA0-PA7
DTACK*
DTACK*
PB0-PB7
R/W*
R/W*
CLK
CLK
PC0-PC7
RESET*
RESET*
A6-A23
MAD
CS*
(Register select pins)
RS1-RS5
A1-A5
M68k
M68230

7. M68230 Ports

8. Registers in M68230 M68230 contains 23 registers.
Each of the registers have a unique address that refers to them.
To initialize ports, some registers need to be configured.
Port General Control Register.
Port X Control Register (A, B).
Port X Data Direction Register (A, B, C).
Port X Data Register (A, B, C).

9. PGCR Port General Control Register.
Used to set the operation of Port A & Port B.
You only need to know (and use) Mode 0.
MOVE.B #$00,PGCR

10. PGCR Settings PGCR= Description $00
Unidirectional 8-bit transfer (Port A, Port B)
Mode
$40
Unidirectional 16-bit transfer (Port A + Port B) 1
$80
Bidirectional 8-bit transfer on
Port B, bit I/O on Port A. 2
$C0
Bidirectional 16-bit transfer (Port A + Port B) 3

11. Port X Control Register
Used to set buffering of input/output on PXDR.
Three modes:
Mode 00.
Mode 01.
Mode 1X.
You only need to know (and use) mode 1X.

12. PXCR Settings PXCR= Description $00 Double-buffered input Sub-mode 00
$40
Double-buffered output 01
$80
Bit I/O 1X

13. Port X Data Direction Register
Used to specify the direction of data transfer for each bit in the port.
Two states:
If PXDDR bit = 0, will be set as input.
If PXDDR bit = 1, will be set as output.

14. Port X Data Register Contains the data sent/received to/from devices.
Each PXDR carries 8-bits of data.
There are three data registers in the M68230: PADR, PBDR, PCDR.

15. Port Initialization To perform port initialization:
Assign the register addresses to a unique name.
PGCR must be set to #$00.
PXCR must be set to #$80.
Set PXDDR to input or output.

16. Port Initialization Example
Address
START ORG $XXXXXX
PGCR EQU $A00001
PACR EQU $A0000D
PBCR EQU $A0000F
PADDR EQU $A00005
PBDDR EQU $A00007
PCDDR EQU $A00009
PADR EQU $A00011
PBDR EQU $A00013
PCDR EQU $A00019
MOVE.B #$00,PGCR
MOVE.B #$80,PACR/PBCR
MOVE.B #$XX,PADDR/PBDDR/PCDDR
(DEPENDING ON THE H/W)
PGCR
$A00001
PACR
$A0000D
PBCR
$A0000F
PADDR
$A00005
PBDDR
$A00007
PCDDR
$A00009
PADR
$A00011
PBDR
$A00013
PCDR
$A00019

17. 68230 Interfacing

18. M68230 Interfacing
M68230 interfacing is similar to memory interfacing in last chapter.
Instead of interfacing memory, M68230 is interfaced.
A1-A5 is reserved for M68230, the rest used for decoder.

19. Example: Full Decoding
Interface M68230 with M68k so that its base address is $A50000.

20. Discussion
For M68230 interfacing, 5 lines are automatically reserved for M68230.

21. Step 1: Allocate Address LineX X X X X
5 lines allocated
UDS/LDS
(reserved)

22. Step 2: Set Base Address 1 1 1 1 X X X X X A 5 UDS/LDS (reserved) A231 1 1 X X X X X A 5
UDS/LDS
(reserved)

23. Step 3: Find Lower Range 1 1 1 1 A 5 A23 A22 A21 A20 A19 A18 A17 A161 1 1 A 5

24. Step 4: Find Upper Range 1 1 1 1 1 1 1 1 1 1 A 5 3 F A23 A22 A21 A201 1 1 1 1 1 1 1 1 A 5 3 F

25. Step 5: Design Decoder 1 1 1 1 A 5 A23 A22 A21 A20 A19 A18 A17 A16 A151 1 1 A 5
SELIO*
A23
A16
NAND
A15 A8 A7 A6
AS*

26. Interfaced with M68k (M68230 I/O)
Memory Block Diagram
$000000
unused
$A50000
(Lower Range)
Interfaced with M68k (M68230 I/O)
$A5003F
(Upper Range)
unused
$FFFFFF

27. Sample Programs

28. LEDs & Switches

29. Example 1

30. Example 1: Set LED M68230 LED0 A set of LEDs are connected to PB0
Port B in M Write a program
that turns on LED3 and LED4, and
turns off the rest.
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
LED1
LED2
Port
Address
PGCR
$800001
PACR
$800005
PBCR
$800007
PADDR
$800009
PBDDR
$80000D
PCDDR
$80000F
PADR
$800011
PBDR
$800013
PCDR
$800019
LED3
LED4
LED5
LED6
LED7

31. Discussion Port B should be initialized before being used.
To turn on LED, the voltage at Port B bits should be high.
To turn off LED, the voltage at Port B should be low.

32. LED Operation A B A B LED Zero biased (OFF) 1 Reverse biased (OFF) 1
Zero biased (OFF) 1
Reverse biased (OFF) 1
Forward biased (ON) 1 1
Zero biased (OFF)

33. Solution START ORG $1000 PGCR EQU $800001 PBCR EQU $800007
PBDDR EQU $80000D
PBDR EQU $800013
INIT MOVE.B #$00,PGCR
MOVE.B #$80,PBCR
MOVE.B #$FF,PBDDR
ONLED MOVE.B #% ,PBDR
END START

34. Example 1: Set LED M68230 LED0 PB0 PB1 LED1 PB2 PB3 LED2 PB4 PB5 11

35. Example 2

36. Example 2: Read Switches & Output to LED
A set of switches are connected to Port A, and a set of LEDs are connected to Port B in M Write a program that reads the value in the switches and turns on the respective LEDs.

37. Switch Operation
+5V
Switch A
OPEN A
CLOSE 1 R

38. Switch Operation
+5V R
Switch A A
OPEN 1
CLOSE

39. Circuit Diagram +5V M68230 LED0 PA0 PB0 PA1 PB1 LED1 PA2 PB2 PA3 PB3

40. Port Assignments Port Address PGCR $A00001 PACR $A0000D PBCR $A0000F
PADDR
$A00005
PBDDR
$A00007
PCDDR
$A00009
PADR
$A00011
PBDR
$A00013
PCDR
$A00019

41. Discussion Both Port A & B should be initialized before being used.
When the switch is OPEN, 5V is passed to M68230 (logic high).
When the switch is CLOSE, 0V is passed to M68230 (logic low).

42. Solution – Initialize Ports
INIT MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$80,PBCR
MOVE.B #$00,PADDR
MOVE.B #$FF,PBDDR

43. Solution – Solve Problem
LOOP MOVE.B PADR,D0
MOVE.B D0,PBDR
BRA LOOP

44. Solution – Complete Program
START ORG $1000
PGCR EQU $A00001
PACR EQU $A0000D
PBCR EQU $A0000F
PADDR EQU $A00005
PBDDR EQU $A00007
PADR EQU $A00011
PADR EQU $A00013
INIT MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$80,PBCR
MOVE.B #$00,PADDR
MOVE.B #$FF,PBDDR
LOOP MOVE.B PADR,D0
MOVE.B D0,PBDR
BRA LOOP
END START

45. Sample Output +5V M68230 LED0 PA0 PB0 PA1 PB1 1 LED1 PA2 PB2 PA3 PB31
PADR  D0  PBDR
+5V R

46. 7-Segment

47. 7-Segment Consists of 7-LEDs arranged together.
Can display numbers and characters.
Each segment is marked with a letter (a to g).
To display characters, need to turn on/off certain segments.
Also has E (enable) pin to turn on/off 7-segment.

48. Interfacing 7-Segment with M68230
To interface with M68230, each segment (a to g) is connected to a port in M68230.
The E signal must also be connected to a port to enable/disable the 7-segment.

49. 7-Segment Types There are two types of 7-segment displays:
Common cathode.
Common anode.
Each type differs in how they behave with certain inputs.

50. Common Cathode 7-Segment
Input (from M68230) E
Input
Output
OFF 1 ON 1
OFF 1 1 ON

51. Example: Interfacing CC 7-Segment with M68230 (No Transistor)b c d e f g B0 B1 B2 B3 B4 B5 B6 B7 E
(Common cathode)
To turn on the 7-segment, E must be set to 0,
and the input to be turned on must be set to 1.

52. Example: Interfacing CC 7-Segment with M68230 (With Transistor)B0 B1 B2 B3 B4 B5 B6 B7 a b c d e f g E
M68230 R
(Common cathode)
To turn on the 7-segment,
E must be set to 1,
and the input to be turned on
must be set to 1.
By setting E to 1, the transistor is
turned ON, providing a
path to GND.

53. Displaying Numbers: CC7S (No Transistor)f g
Number 1 X X X X X X X
None 1 1 1 1 1 1 1 1 2 1 1 1 1 1 3 1 1 1 1 4 1 1 1 1 1 5 1 1 1 1 1 6 1 1 1 7 1 1 1 1 1 1 1 8 1 1 1 1 1 9 1 1 1 1 1 1

54. Displaying Numbers: CC7S (with Transistor)f g
Number X X X X X X X
None 1 1 1 1 1 1 1 1 1 1 2 1 1 1 1 1 1 3 1 1 1 1 1 4 1 1 1 1 1 1 5 1 1 1 1 1 1 6 1 1 1 1 7 1 1 1 1 1 1 1 1 8 1 1 1 1 1 1 9 1 1 1 1 1 1 1

55. Common Anode 7-Segment E Input (to M68230) E Input Output OFF 1 OFF 1
OFF 1
OFF 1 ON 1 1
OFF

56. Example: Interfacing CA 7-Segment with M68230b c d e f g B0 B1 B2 B3 B4 B5 B6 B7 E
(Common anode)
To turn on the 7-segment, E must be set to 1,
and the input to be turned on must be set to 0.

57. Displaying Numbers: CA7S (No Transistor)f g
Number X X X X X X X
None 1 1 1 1 1 1 1 1 1 1 1 1 1 3 1 1 1 1 4 1 1 1 5 1 1 1 6 1 1 1 1 1 7 1 8 1 1 1 9 1 1 1

58. Example 1

59. Example: Displaying ‘C’ on 7-Seg
b=0
c=0
d=1
e=1
f=1
g=0 B0 B1 B2 B3 B4 B5 B6 B7
E=1
(Common cathode) R
MOVE.B #$00,PGCR
MOVE.B #$80,PBCR
MOVE.B #$FF,PBDDR
ULANG MOVE.B #$B9,PBDR
BRA ULANG

60. Displaying More Numbers/Characters
7-Segments can also be grouped together to display multiple numbers/characters.
Usually done using a technique called multiplexing.

61. Interfacing 2 7-Segments with M68230b c d e f g a b c d e f g B0 B1 B2 B3 B4 B5 B6 B7
(Common cathode) E1 A0 A1 E2

62. Example 2

63. Example: Displaying on Multiple 7-Segs
Write a program to display ‘12’ on 2 7-Segment displays. The circuit diagram is shown.

64. Example: Displaying 12 on 2 7-Segmentsb c d e f g a b c d e f g B0 B1 B2 B3 B4 B5 B6 B7
(Common cathode) E1 A0 A1 E2

65. Step 1: Init Ports MOVE.B #$00,PGCR MOVE.B #$80,PACR MOVE.B #$80,PBCR
MOVE.B #$FF,PADDR
MOVE.B #$FF,PBDDR

66. Step 2: Activate E2, Send First Number
MOVE.B #$01,PADR * activate E2
MOVE.B #$5B,PBDR * display 2
BSR DELAY * delay for a while to * allow 7-seg to
* turn on.

67. Example: Displaying 12 on 2 7-Segmentsb c d e f g
B0=1
B1=1
B2=0
B3=1
B4=1
B5=0
B6=1 B7
OFF a b c d e f g
(Common cathode)
E1 = 1 (off) A0 A1
E2 = 0 (on)
M68230

68. Step 2: Activate E1, Send Second Number
MOVE.B #$02,PADR * activate E1
MOVE.B #$06,PBDR * display 1
BSR DELAY * delay for a while to * allow 7-seg to
* turn on.

69. Example: Displaying 12 on 2 7-Segmentsb c d e f g a b c d e f g
B0=0
B1=1
B2=1
B3=0
B4=0
B5=0
B6=0 B7
OFF
(Common cathode)
E1 = 0 (on) A0 A1
E2 = 1 (off)
M68230

70. Step 3: Activate E2 Back, Send First Number Again
MOVE.B #$01,PADR * activate E2
MOVE.B #$5B,PBDR * display 2
BSR DELAY * delay for a while to * allow 7-seg to
* turn on.

71. Example: Displaying 12 on 2 7-Segmentsb c d e f g
B0=1
B1=1
B2=0
B3=1
B4=1
B5=0
B6=1 B7
OFF a b c d e f g
(Common cathode)
E1 = 0 (off) A0 A1
E2 = 1 (on)
M68230

72. Discussion
Using multiplexing, only one digit may be turned on at one time.
But, if the delay is fast enough (<100ms), our eyes won’t be able to catch the change.

73. Example: Displaying 12 on 2 7-Segmentsb c d e f g a b c d e f g B0 B1 B2 B3 B4 B5 B6 B7
(Common cathode) E1 A0 A1 E2

74. Complete Program ORG $080C00 DELAY MOVE.L #50,D7 DELLOOP SUB.L #1,D7
CMP.L #0,D7
BNE DELLOOP
RTS
START ORG $080D00
PGCR EQU $100001
PADDR EQU $100005
PBDDR EQU $100007
PCDDR EQU $100009
PADR EQU $100011
PBDR EQU $100013
PCDR EQU $100019
PACR EQU $10000D
PBCR EQU $10000F
INIT MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$80,PBCR
MOVE.B #$03,PADDR
MOVE.B #$7F,PBDDR
BEGIN MOVE.B #$01,PADR
MOVE.B #$5B,PBDR
BSR DELAY
MOVE.B #$02,PADR
MOVE.B #$06,PBDR
BRA BEGIN
END START

75. Example 2

76. Example: Displaying on 5 7-Segs.
A set of 7-segment displays are connected on Port A and Port B in M Write a program to display the message ‘HELLO’ on the 7-segment display.

77. Circuit Diagram M68230 A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7E4 E3 E2 E1 E0

78. Algorithm Turn on E4, Turn on E3, Turn on E2, Turn on E1, Turn on E0,
Display ‘H’.
Delay for a while.
Turn on E3,
Display ‘E’.
Turn on E2,
Display ‘L’.
Turn on E1,
Turn on E0,
Display ‘O’.
Do E4 again.

79. Character H A = 0 B = 1 C = 1 D = 0 E = 1 MOVE.B #%01110110,PBDR F = 1
G = 1
MOVE.B #% ,PBDR OR
MOVE.B #$76,PBDR

80. Character E A = 1 B = 0 C = 0 D = 1 E = 1 MOVE.B #%01111001,PBDR F = 1
G = 1
MOVE.B #% ,PBDR OR
MOVE.B #$79,PBDR

81. Character L A = 1 B = 0 C = 0 D = 1 E = 1 MOVE.B #%00111001,PBDR F = 1
G = 0
MOVE.B #% ,PBDR OR
MOVE.B #$39,PBDR

82. Character H A = 1 B = 1 C = 1 D = 1 E = 1 MOVE.B #%00111111,PBDR F = 1
G = 0
MOVE.B #% ,PBDR OR
MOVE.B #$3F,PBDR

83. Program ORG $080C00 DELAY MOVE.L #50,D7 * 80 MS DELAY
DELLOOP SUB.L #1,D7
CMP.L #0,D7
BNE DELLOOP
RTS
START ORG $080D00
PGCR EQU $100001
PADDR EQU $100005
PBDDR EQU $100007
PADR EQU $100011
PBDR EQU $100013
PACR EQU $10000D
PBCR EQU $10000F
INIT MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$80,PBCR
MOVE.B #$FF,PADDR
MOVE.B #$FF,PBDDR
HELLO MOVE.B #$0F,PADR * ACTIVATE E4
MOVE.B #$76,PBDR * DISPLAY H
BSR DELAY
MOVE.B #$17,PADR * ACTIVATE E3
MOVE.B #$79,PBDR * DISPLAY E
MOVE.B #$1B,PADR * ACTIVATE E2
MOVE.B #$39,PBDR * DISPLAY L
MOVE.B #$1D,PADR * ACTIVATE E1
MOVE.B #$1E,PADR * ACTIVATE E0
MOVE.B #$3F,PBDR * DISPLAY O
BRA HELLO
END START

84. 7-Segment + BCD Decoder

85. 7-Segment + BCD Decoder
A BCD  7-Segment decoder can be used to simplify the interface to M68230.
Just send a BCD number, and it will be automatically displayed at 7-segment.
Also reduces the number of connections required to display 7-segment values.

86. Example: 7-Segment + BCD Decoderf g a b c d e f g B0 B1 B2 B3 B4 B5 B6 B7
BCD 
7-Seg
Decoder
(Common cathode) E1 A0 A1 E2

87. BCD Decoder I/O B3 B2 B1 B0 Number 1 1 1 2 1 1 3 1 4 1 1 5 1 1 6 1 1 11 1 1 2 1 1 3 1 4 1 1 5 1 1 6 1 1 1 7 1 8 1 1 9

88. Example 3

89. Displaying 12 on 7-Segments
A circuit is wired as in the next figure. Write a program that displays ‘12’ on the 7-Segment.

90. Example: 7-Segment + BCD Decoderf g a b c d e f g B0 B1 B2 B3 B4 B5 B6 B7
BCD 
7-Seg
Decoder
(Common cathode) E1 A0 A1 E2

91. Step 1: Init Ports MOVE.B #$00,PGCR MOVE.B #$80,PACR MOVE.B #$80,PBCR
MOVE.B #$FF,PADDR
MOVE.B #$FF,PBDDR

92. Step 2: Activate E2, Send First Number
MOVE.B #$01,PADR * activate E2
MOVE.B #$02,PADR * display 2
BSR DELAY * delay for a
* while to allow 7-seg * to turn on.

93. Example: Displaying 12 on 2 7-Segmentsb c d e f g
OFF a b c d e f g
B0=0
B1=1
B2=0
B3=0 B4 B5 B6 B7
BCD 
7-Seg
Decoder
(Common cathode)
E1 = 1 (off) A0 A1
E2 = 0 (on)
M68230

94. Step 2: Activate E1, Send Second Number
MOVE.B #$02,PADR * activate E1
MOVE.B #$01,PADR * display 1
BSR DELAY * delay for a while
* to allow 7-seg * to turn on.

95. Example: Displaying 12 on 2 7-Segmentsb c d e f g a b c d e f g
B0=0
B1=1
B2=1
B3=0
B4=0
B5=0
B6=0 B7
BCD 
7-Seg
Decoder
OFF
(Common cathode)
E1 = 0 (on) A0 A1
E2 = 1 (off)
M68230

96. Step 4: Activate E2 Back, Send First Number Again
MOVE.B #$01,PADR * activate E2
MOVE.B #$02,PADR * display 2
BSR DELAY * delay for a
* while to allow 7-seg * to turn on.

97. Example: Displaying 12 on 2 7-Segmentsb c d e f g
OFF a b c d e f g
B0=0
B1=1
B2=0
B3=0 B4 B5 B6 B7
BCD 
7-Seg
Decoder
(Common cathode)
E1 = 1 (off) A0 A1
E2 = 0 (on)
M68230

98. Discussion
Using multiplexing, only one digit may be turned on at one time.
But, if the delay is fast enough (<100ms), our eyes won’t be able to catch the change.

99. Example: Displaying 12 on 2 7-Segmentsb c d e f g a b c d e f g B0 B1 B2 B3 B4 B5 B6 B7
BCD 
7-Seg
Decoder
(Common cathode) E1 A0 A1 E2

100. Complete Program ORG $080C00 DELAY MOVE.L #50,D7 DELLOOP SUB.L #1,D7
CMP.L #0,D7
BNE DELLOOP
RTS
START ORG $080D00
PGCR EQU $100001
PADDR EQU $100005
PBDDR EQU $100007
PCDDR EQU $100009
PADR EQU $100011
PBDR EQU $100013
PCDR EQU $100019
PACR EQU $10000D
PBCR EQU $10000F
INIT MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$80,PBCR
MOVE.B #$FF,PADDR
MOVE.B #$FF,PBDDR
BEGIN MOVE.B #$01,PADR
MOVE.B #$02,PBDR
BSR DELAY
MOVE.B #$02,PADR
MOVE.B #$01,PBDR
BRA BEGIN
END START

101. DC Motor

102. Controlling DC Motors
Has two terminals (positive/negative), connected to DC voltage.
If positive voltage applied at positive terminal, motor moves clockwise.
If negative voltage applied at positive terminal, motor moves anti-clockwise.

103. DC Motor +12V +12V + - + - + with + = clockwise
+ with - = anti-clockwise

104. Interfacing DC Motor with M68230 – Single Direction+ -
M68230 A0 A1 A2 A3 A4 A5 A6 A7
+12V R
MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$FF,PADDR
MOVE.B #$10,PADR

105. Interfacing DC Motor with M68230 (Two Directions)
+12V R R R R A0 T1 T2 A2 + - R R A1 A3 T4 T3
PNP transistors are
turned on by 0 at base.
NPN transistors are
turned on by 1 at base.

106. Moving the Motor Clockwise
MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$FF,PADDR
MOVE.B #% ,PADR
(Turn on T1 and T3)

107. Interfacing DC Motor with M68230 (Clockwise)
+12V R R 1 R R 1 A0 T1 T2 A2 + - 1 1 R R A1 A3 T4 T3
Positive meets positive, clockwise direction

108. Moving the Motor Anti-clockwise
MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$FF,PADDR
MOVE.B #% ,PADR
(Turn on T2 and T4)

109. Interfacing DC Motor with M68230 (Anti-clockwise)
+12V R R 1 R R 1 A0 T1 T2 A2 + - 1 1 R R A1 A3 T4 T3
Positive meets negative, anti-clockwise direction

110. Keypad

111. Keypad A set of switches.
CPU determines what button pressed by scanning each column in turn.
Need to be de-bounced after each key press:
Done using de-bouncing subroutine.

112. Keypad P0 P1 P2 P4 P5 P6 P7 1 4 7 * 2 5 8 3 6 9 #

113. Step 1: Initialization Lets say Port A is connected to keypad.
MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$0F,PADDR

114. Step 2 – Scan 1st Column
P0=1 P1 P2 1 4 7 * 2 5 8 3 6 9 # P4 P5 P6 P7

115. Step 2: Scan 1st Column
COL1 BCLR.B #1,PBDR
BCLR.B #2,PBDR
BSET.B #0,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS1
CMP.B #$20,D1
BEQ IS4
CMP.B #$40,D1
BEQ IS7
CMP.B #$80,D1
BEQ ISSTAR
BNE COL2
IS1 MOVE.B #1,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS4 MOVE.B #4,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS7 MOVE.B #7,D0
ISSTAR MOVE.B #$00,D0
* MOVE.B #9,D3 and TRAP #0 are used as an example to display
the output to screen. Replace it with your own code.

116. Step 3 – Scan 2nd Column P0
P1=1 P2 1 4 7 * 2 5 8 3 6 9 # P4 P5 P6 P7

117. Step 3: Scan 2nd Column COL2 BCLR.B #0,PBDR BCLR.B #2,PBDR
BSET.B #1,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS2
CMP.B #$20,D1
BEQ IS5
CMP.B #$40,D1
BEQ IS8
CMP.B #$80,D1
BEQ IS0
BNE COL3
IS2 MOVE.B #2,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS5 MOVE.B #5,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS8 MOVE.B #8,D0
IS0 MOVE.B #0,D0

118. Step 4 – Scan 3rd Column P0 P1
P2=1 1 4 7 * 2 5 8 3 6 9 # P4 P5 P6 P7

119. Step 4: Scan 3rd Column COL3 BCLR.B #0,PBDR BCLR.B #1,PBDR
BSET.B #2,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS3
CMP.B #$20,D1
BEQ IS6
CMP.B #$40,D1
BEQ IS9
CMP.B #$80,D1
BEQ ISHASH
BNE COL1
IS3 MOVE.B #3,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS6 MOVE.B #6,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS9 MOVE.B #9,D0
ISHASH MOVE.B #0,D0

120. Complete Program ORG $080C00 DELAY MOVE.B #$1F,D4 NEXTDEL SUB.B #1,D4
BNE NEXTDEL
WAIT MOVE.B PBDR,D2
AND.B #$F0,D2
CMP.B #$00,D2
BNE WAIT
RTS
START ORG $080D00
PGCR EQU $100001
PACR EQU $10000D
PBCR EQU $10000F
PADDR EQU $100005
PBDDR EQU $100007
PCDDR EQU $100009
PADR EQU $100011
PBDR EQU $100013
PCDR EQU $100019
INIT MOVE.B #$00,PGCR
MOVE.B #$80,PACR
MOVE.B #$80,PBCR
MOVE.B #$0F,PBDDR
MOVE.B #$00,PBDR
COL1 BCLR.B #1,PBDR
BCLR.B #2,PBDR
BSET.B #0,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS1
CMP.B #$20,D1
BEQ IS4
CMP.B #$40,D1
BEQ IS7
CMP.B #$80,D1
BEQ ISSTAR
BNE COL2
IS1 MOVE.B #1,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS4 MOVE.B #4,D0
IS7 MOVE.B #7,D0
ISSTAR MOVE.B #$00,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
END START
COL2 BCLR.B #0,PBDR
BCLR.B #2,PBDR
BSET.B #1,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS2
CMP.B #$20,D1
BEQ IS5
CMP.B #$40,D1
BEQ IS8
CMP.B #$80,D1
BEQ IS0
BNE COL3
IS2 MOVE.B #2,D0

121. Complete Program
IS5 MOVE.B #5,D0 BSR WAIT MOVE.B #9,D3 TRAP #0 BRA COL1 IS8 MOVE.B #8,D0 IS0 MOVE.B #0,D0 COL3 BCLR.B #0,PBDR BCLR.B #1,PBDR BSET.B #2,PBDR MOVE.B PBDR,D1 AND.B #$F0,D1 CMP.B #$10,D1 BEQ IS3 CMP.B #$20,D1 BEQ IS6 CMP.B #$40,D1 BEQ IS9 CMP.B #$80,D1 BEQ ISHASH BNE COL1
IS3 MOVE.B #3,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS6 MOVE.B #6,D0
IS9 MOVE.B #9,D0
ISHASH MOVE.B #0,D0

122. Example

123. Example – 4 Pressed P0 P1 P2 1 4 7 * 2 5 8 3 6 9 # P4 P5 P6 P7

124. Step 2: Scan 1st Column IS4 MOVE.B #4,D0 BSR WAIT MOVE.B #9,D3 TRAP #0
COL1 BCLR.B #1,PBDR
BCLR.B #2,PBDR
BSET.B #0,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS1
CMP.B #$20,D1
BEQ IS4
CMP.B #$40,D1
BEQ IS7
CMP.B #$80,D1
BEQ ISSTAR
BNE COL2
IS1 MOVE.B #1,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS4 MOVE.B #4,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS7 MOVE.B #7,D0
ISSTAR MOVE.B #$00,D0

125. Example – 8 Pressed P0 P1 P2 1 4 7 * 2 5 8 3 6 9 # P4 P5 P6 P7

126. Step 3: Scan 2nd Column COL2 BCLR.B #0,PBDR BCLR.B #2,PBDR
BSET.B #1,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS2
CMP.B #$20,D1
BEQ IS5
CMP.B #$40,D1
BEQ IS8
CMP.B #$80,D1
BEQ IS0
BNE COL3
IS2 MOVE.B #2,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS5 MOVE.B #5,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS8 MOVE.B #8,D0
IS0 MOVE.B #0,D0

127. Example – 6 Pressed P0 P1 P2 1 4 7 * 2 5 8 3 6 9 # P4 P5 P6 P7

128. Step 4: Scan 3rd Column COL3 BCLR.B #0,PBDR BCLR.B #1,PBDR
BSET.B #2,PBDR
MOVE.B PBDR,D1
AND.B #$F0,D1
CMP.B #$10,D1
BEQ IS3
CMP.B #$20,D1
BEQ IS6
CMP.B #$40,D1
BEQ IS9
CMP.B #$80,D1
BEQ ISHASH
BNE COL1
IS3 MOVE.B #3,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS6 MOVE.B #6,D0
BSR WAIT
MOVE.B #9,D3
TRAP #0
BRA COL1
IS9 MOVE.B #9,D0
ISHASH MOVE.B #0,D0

129. Delay Subroutine

130. Delay Subroutine
In some applications, we may need to delay the output before executing next instruction.
Can be achieved using delay subroutine:
Does some meaningless repetitive task over and over.
“Wastes” processing time of M68k.
Can be set to repeat until desired delay is achieved.

131. Delay Subroutine Example
DELAY MOVE.L #xxx,Dn
LOOP SUB.L #1,Dn
CMP.L #0,Dn
BNE LOOP
RTS

132. Clock Cycles to Complete
Calculating The Delay
To calculate delay, you need to know the time required to execute each instruction:
Instruction
Clock Cycles to Complete
Time
MOVE.L 12 s
SUB.L 16 s
CMP.L 14 s
BNE 10 s
RTS
10MHz  T = 1/10MHz = 1x10-7secs.
Executed n times.

133. Calculating the Delay – M68k 10MHz
For 1 sec., 10,000,000 clock cycles are required.
10,000,000 = ( )n
10,000,000 = n
n = (10,000,000 – 28)/40
n = (10,000,000 – 28)/40 = 249,999

134. Delay Subroutine Example – 1s
DELAY MOVE.L #249999,D6
LOOP SUB.L #1,D6
CMP.L #0,D6
BNE LOOP
RTS

135. Calculating The Delay – 0.25s
To calculate delay, you need to know the time required to execute each instruction:
Instruction
Clock Cycles to Complete
Time
MOVE.L 12 s
SUB.L 16 s
CMP.L 14 s
BNE 10 s
RTS
10MHz  T = 1/10MHz = 1x10-7secs.
Executed n times.

136. Calculating the Delay
For 0.25 sec., 2,500,000 clock cycles are required.
2,500,000 = ( )n
2,500,000 = n
n = (2,500,000 – 28)/40
n = (2,500,000 – 28)/40 = 62,499

137. Delay Subroutine Example – 0.25s
DELAY MOVE.L #62499,D6
LOOP SUB.L #1,D6
CMP.L #0,D6
BNE LOOP
RTS

138. Implementing Delay START ORG $090000
INIT MOVEA.L #$100001,A * base address of pi/t
MOVE.B #$80,$E(A6) * configure port B control reg to mode 1x
MOVE.B #$FF,$6(A6) * configure port B data reg to o/p
LOOP MOVE.B #$FF,$100013
BSR DELAY
MOVE.B #$00,$100013
BRA LOOP
DELAY MOVE.L #249999,D7
DELLOOP SUB.L #1,D7
CMP.L #0,D7
BNE DELLOOP
RTS
END START
Turn on all LEDs,
Wait 1 second,
Turn off all LEDs,
Wait 1 second.

139. Conclusion

140. Conclusion
The M68230 is a parallel interface used by M68k to connect with various devices.
The M68230 has three ports, which can be configured to interface with many devices.
To use the ports, it MUST be initialized first.

141. Conclusion
The delay subroutine is used to “waste” the CPU’s time by telling it to do repetitive tasks.
The delay format is basically the same, just adjust the counter to get the delay you want.

142. The End Please read: Antonakos, pg. 352-366 M68230 Datasheet
Ablelogic, Abitec, VTES Manuals