1. Microelectronic Circuit Design, 3E McGraw-Hill Chapter 15 Differential Amplifiers and Operational Amplifier Design Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock

2. Microelectronic Circuit Design, 3E McGraw-Hill Two-stage Prototype of an Op Amp For higher gain, pnp C-E amplifier is connected at output of the input stage differential amplifier. Virtual ground at emitter node allows input stage to achieve full inverting amplifier gain without needing emitter bypass capacitor. PNP transistor permits direct coupling between stages, allows emitter of pnp to be connected to ac ground and provides required voltage level shift to bring output back to zero. Bypass and coupling capacitors are thus eliminated. Differential amplifier provides desired differential input,CMRR and ground referenced output as the input stage of op amp.

3. Microelectronic Circuit Design, 3E McGraw-Hill Two-stage Op Amp: DC Analysis This circuit requires a resistance in series with emitter of Q 3 to stabilize Q-point (as collector current of Q 3 is exponentially dependent on base- emitter voltage), at the expense of voltage gain loss. From dc equivalent circuit, I E1= I E2 = I 1 /2. If base current of Q 3 is neglected and C-B current gains are one, As both inputs are zero, output also=0 I S3 is saturation current. For zero offset voltage

4. Microelectronic Circuit Design, 3E McGraw-Hill Two-stage Op Amp: AC Analysis (Differential Mode) Half-circuit can be constructed from ac equivalent circuit in spite of asymmetry, as voltage variations at collector of Q 2 don’t substantially alter transistor current in forward-active operation region. From small-signal circuit model,

5. Microelectronic Circuit Design, 3E McGraw-Hill Two-stage Op Amp: AC Analysis (Differential Mode cont.) This can be rewritten as Base current of Q 3 is neglected so, I C2 R C =V BE3 =0.7 V, I C3 R=V EE, Upper limit onI C2 and I 1 is set by maximum dc bias current at input, lower limit on I C3 is set by minimum current to drive total load impedance at output.

6. Microelectronic Circuit Design, 3E McGraw-Hill Two-stage Op Amp: AC Analysis (Common Mode) From ac equivalent circuit, we observe that circuitry beyond collector of Q 2 is same as that in differential mode half-circuit. The difference in collector currents causes difference in output voltage. From ac equivalent circuit for common- mode inputs, For differential-mode inputs, collector current was Thus,

7. Microelectronic Circuit Design, 3E McGraw-Hill Improving Op Amp Voltage Gain Overall amplifier gain decreases rapidly as the quiescent current of second stage decreases. Voltage gain can improve if resistor in second stage is replaced by current source with R 2 >> r o3, if R 2 is neglected, This expression can be reduced to Because of the high output resistance the amplifier resembles a transconductance amplifier more than a true low output resistance voltage amplifier.

8. Microelectronic Circuit Design, 3E McGraw-Hill Reducing Output Resistance A C-C stage is added to the prototype to maintain voltage gain but reduce output resistance. From ac equivalent circuit,

9. Jaeger/Blalock 7/28/07 Microelectronic Circuit Design, 3E McGraw-Hill Three-Stage Bipolar Op Amp Analysis Problem: Find differential-mode gain, CMRR, input and output resistances. Given data: V CC =V EE =15 V,  o1 =  o2 =  o3 =  o4 =100, V A3 =75V, I 1 = 100  A, I 2 = 500  A, I 3 = 5 mA, R 1 = 750 k , R L = 2 k , R 2 and R 3 are infinite. Analysis: Voltage at node 3 is one base- emitter voltage drop above zero. V EC3 =15-0.7=14.3 V.

10. Microelectronic Circuit Design, 3E McGraw-Hill Three-Stage Bipolar Op Amp Analysis (cont.) Overall gain is lower because of lower gain of first stage (since r  3 << R C ) and lower gain than expected for second stage (as reflected loading of R L is of same order as r  3 ).