1. IEE7621 (5041) Special Topics on Low-Power Design Chen-Yi Lee Department of Electronics Engineering, NCTU Autumn 2012, 1

2. Course Outline Objectives – Save power/energy in CMOS-based chips/systems Optimizing Power at different levels – Design time – Standby – Run time Ultra low power/voltage designs 2

3. Grading Rules Mid-term exam (Nov. 11, 2013): 30% Final-term exam (Jan. 13, 2014): 35% Term Project (Dec. 30, 2012): 35% – Independent work without team members – Optimize 8X8 MAC’s power while reduce area. Extra Bonus (3 exercises): 15% – Oct. 14, Nov. 11, Dec. 23 3

4. Related Issues TA: P.Y. Tsai (EIC213) Course Web site: http://www.si2lab.org/course/lpdesign http://www.si2lab.org/course/lpdesign Technology: UMC 90nm CMOS process Lab: ED415 Ref Book: “Low-Power Design Essentials”, by Jan Rabaey (ISBN: 978-0-387-71712-8) 4