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Ultra High Speed Digital Circuits Brandon Ravenscroft 12/03/2015.

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Presentation on theme: "Ultra High Speed Digital Circuits Brandon Ravenscroft 12/03/2015."— Presentation transcript:

1 Ultra High Speed Digital Circuits Brandon Ravenscroft 12/03/2015

2 How Fast Is Ultra High Speed? Speeds which require special materials, cables, connectors or severely restrictive board layouts Fastest commercially available parts (clock speed and rise/fall time) Clock rates and rise times faster than we saw in class material

3 Ultra High Speed Considerations Alternate Logic Types Dielectric Materials Connectors and Cables Voltage and Power Measurement Techniques Ultra High Speed IC Examples Ultra High Speed Layout Challenges

4 Ultra High Speed Considerations

5 Current Mode Logic (CML) No official standardization. Typically vendor specific [3] Used for high speed, point to point signaling only (Typically Differential) Needs termination resistors for current flow Input stage has 2 emitter- followers Output stage is a BJT differential pair AC or DC Coupling Used up to 10 Gbps+[2, 3] Maxim Integrated CML Implementation [2]

6 Current Mode Logic (CML) Maxim Integrated Implementation [2]: On chip 50 Ω Input and Output Terminations Typical 16 mA Current Source Vcc: +3.3 V Single Supply Single ended or differential mode. Typical 800 mV output differential voltage Common mode output voltage of Vcc – 0.2 V Maxim Integrated CML Implementation [2]

7 Low Voltage Differential Signaling (LVDS) Developed by National Semiconductor Standardized as ANSI/TIA/EIA-644-A [3] Used for point-to-point or multi-drop transmission of low voltage differential signals (Typically Differential) Input Voltage from 0 to 2.4 V 350 mV differential output voltage Used up to 2.5 Gbps Requires 100 Ω termination Very low power consumption (load current must be < 3.5 mA) – less than ECL or CML DC Coupling only [2, 3] Maxim Integrated LVDS Implementation Output Stage [2]

8 Low Voltage Differential Signaling (LVDS) Maxim Integrated Implementation Differential input and output terminated in 100 Ω Maxim Integrated LVDS Implementation Output Stage [2] Maxim Integrated LVDS Implementation Input Stage [2]

9 Comparison of Fast Logic Families These three logic families can be interfaced with proper design. ECLLVDSCML BusP-P or Multi-Drop P-P only Relative PowerHighLowMedium CouplingDC or ACDC OnlyDC or AC Termination50 Ω100Ω50 Ω Semiconductor Transistor Type BJTCMOS, BiCMOSBJT, CMOS Speed> 10 Gbps2 Gbps>10 Gbps Fast Logic Families Comparison Data Provided by [3]

10 Ultra High Speed Considerations

11 High Speed Dielectric Materials

12

13 Ultra High Speed Considerations

14 High Speed Connectors BNC (Bayonet Navy or British Naval Connector) Originated in military use – quick to connect/disconnect Used for frequencies up to 4 GHz. Slots radiate above this frequency. Common in 50 Ω and 75 Ω ohm impedance Threaded version (TNC) usable up to 12 GHz PTFE Dielectric [7, 8] BNC Male Connector [6]

15 High Speed Connectors SMA (Sub-miniature type-A) Very widely used in RF/Microwave Operates up to 25 GHz PTFE Dielectric Designed by Bendix Scintilla [7, 8] SMA Male (left) and Female (right) connectors [9]

16 High Speed Connectors K Connector Operates in all K band regions (18- 40 GHz) Developed by Wiltron Advancement of 2.92 mm connector Air Dielectric [7,8] Various K connectors [10]

17 High Speed Connectors 1 mm Connector Developed by Hewlett-Packard Supports frequencies up to 110 [GHz] Air Dielectric Male (left) and Female (right) 1 mm connectors [11]

18 High Speed Coaxial Cable Gore Coaxial Cable [12]

19 Ultra High Speed Considerations

20 Voltage and Power

21 Ultra High Speed Considerations

22 Ultra High Speed Measurement Lower inductance in measurement path to reduce effect on measurement Don’t use ground wire on scope probe Remove clip from probe tip and apply tip directly to test point Connect ground shield directly to circuit ground if possible or place ground wire as close to measurement point as possible Shunt probe capacitance can alter circuit performance

23 Ultra High Speed Measurement Test Point Ground Curlycue

24 Ultra High Speed Considerations

25 Hittite HMC841 D Flip-Flop [15] CML design (single-ended or differential) -3.3 V Supply Max clock rate: 43 GHz Rise/Fall time: 12 ps → F knee = 41.7 GHz Propagation delay: 10 ps 630 mW power consumption Package: 24 lead 4 mm x 4 mm SMT (Area of a dime is ~ 250 mm 2 ) Adjustable output voltage between 200 -850 mVpp HMC841 Diagram [15]

26 Micrel SY55851(A) Any Gate [16] Programmable to perform any Boolean function of two bits Clock frequency up to 3 GHz 100 Ω or 50 Ω CML output on board termination Inputs compatible with differential PECL and CML 2.3 - 6.0 V supply voltage 350 ps propagation delay 110 ps rise/fall time → F knee = 4.5 GHz 10 Pin 3 mm x 3 mm leaded package Micrel SY55851 Functional Block Diagram [16]

27 Ultra High Speed Considerations

28 Simple High Speed Layout Clock divider circuit f A = ½ * f Clk f B = ¼ * f Clk HMC841 D flip-flops will be used. T r = 12 ps, f Clk = 43 GHz max, T d = 10 ps. Setup time not given, assume negligible. Source: [17]

29 Simple High Speed Layout Ignoring Trace Delays f A = ½ * f Clk f B = ¼ * f Clk Time for clock to stable signal 1: 10 ps Time for clock to stable signal 2: 10 ps + 10 ps = 20 ps Source: [17] 1 2

30 Simple High Speed Layout Allowable time for trace and other delays f A = ½ * f Clk f B = ¼ * f Clk 43 GHz clocks requires maximum path delay of 23.3 ps Only 23.3 ps - 20 ps = 300 fs is left for trace and all other delays to achieve maximum clock frequency! At 180 ps/in (FR-4 ) only 1.7 mils are left for traces Source: [17] 1 2

31 Simple High Speed Layout Challenge: Design a layout to implement this circuit with the maximum possible clock frequency. f A = ½ * f Clk f B = ¼ * f Clk Source: [17] 1 2

32 References [1] Title Photo: "Circuit, Circle, Circulation." Digital Media Theory. N.p., 31 Oct. 2013. Web. 02 Dec. 2015.. [2] "Introduction to LVDS, PECL, and CML." Maxim Integrated (2008): 1-14. Web. 27 Nov. 2015.. [3] Goldie, John. "LVDS, CML, ECL-differential Interfaces with Odd Voltages." EETimes. EETimes, 21 Jan. 2003. Web. 02 Dec. 2015.. [4] "Teflon PTFE Properties Handbook." (n.d.): n. pag. Web. 01 Dec. 2015.. [5] "RT/duroid® 5870 /5880 High Frequency Laminates." (n.d.): n. pag. 2015. Web. 01 Dec. 2015.. [6] "BNC." Telco Antennas BNC. Telco Antennas, n.d. Web. 02 Dec. 2015.. [7] "Microwave Connectors." Microwaves101. N.p., n.d. Web. 02 Dec. 2015.. [8] Agilent RF and Microwave Test Accessories. Agilent Technologies, 2003. Web. 01 Dec. 2015..

33 References [9] What Is an SMA Connector? Moton Industrial, n.d. Web. 01 Dec. 2015.. [10] "K Connectors." K Connectors. Carlisle Interconnect Technologies, n.d. Web. 02 Dec. 2015.. [11] Wikipedia Commons. N.p., n.d. Web. 01 Dec. 2015.. [12] "Precision Coaxial Cable." Precision Coaxial Cable. Gore, n.d. Web. 02 Dec. 2015. [13] "Intel 8080 Family." Intel 8080 Family. CPU World, n.d. Web. 02 Dec. 2015.. [14] "Intel® Core I7-920 Processor (8M Cache, 2.66 GHz, 4.80 GT/s Intel® QPI) Specifications." ARK Product Launch. Intel, n.d. Web. 02 Dec. 2015.. [15] "HMC841." (n.d.): n. pag. HMC841. Hittite. Web. 02 Dec. 2015..

34 References [16] "Micrel SY55851(A) Any Gate." (n.d.): n. pag. Micrel SY55851(A) Any Gate. Micrel. Web. 02 Dec. 2012.. [17] "How to Make Frequency Divider?" Digital Logic. N.p., n.d. Web. 02 Dec. 2015.. [18] Slide Template: http://identity.ku.edu/powerpoint/index.shtml

35 Thank you! Questions?


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