1. MACS week 2/2011 status report (@ nearly end of CWO-3) Joze Dedic (joze.dedic@cosylab.com)joze.dedic@cosylab.com … on behalf of CSL MA team the best people make cosylab

2. In this presentation overview MAPS iLLRF NI performance tests Cosylab 2011 2

3. Overview acceptance peak load by the end of CWO-3  ¼+ tickets already ACP  remaining ~¾  ~½ close collaboration of both teams  ~½ “granted” (preceding stages of tickets falling into previous category & mngmnt) Cosylab 2011 3 MAPSMSE14 REDNETRST60 PCC, FEDLSE81 C#SSA20 ISTKU18 iLLRFKVO24 mngmntJDE25 FECOSMVI30 272 JGU61 RMO69 CTM81 MMA46 PFR15 272 StatusStatus IDPW# of tickets OpenOPN206,5103 ImplementedIMP7,54 AcceptedACP5831 PostponedPST00 RejectedREJ00 CanceledCAN08 272146

4. Status reports Cosylab 2011 4 Joze Rok Roland Rok Joze Miha MAPSMSE14 REDNETRST60 PCC, FEDLSE81 C#SSA20 ISTKU18 iLLRFKVO24 mngmntJDE25 FECOSMVI30 272

5. CSL_team.count() = 19 19 people are seriously involved (not all full time) in at least one of the MA sub-projects  projects: PCC, REDNET, FECOS, iLLRF, IS, MAPS  “technologies”: LabVIEW, VHDL, DSP, C#, MA-CM training such a pool of MA-educated resources:  requires careful planning for next CWO  CSL has ~36 developer/engineering FTEs  causes occasional hiccups IS hiccup  Tilen is recovering from surgery  Rok stepped in for IS  Tillen is supposed to be back (for two weeks) the next week  we are doing all we can to help meet MA milestones Cosylab 2011 5

6. MAPS MSE Cosylab 2011 6

7. Work done quite some bug/support TRAC tickets resolved finalized IPv6 support code SIM and MAPS installer MAPIDD document (just updated after the review) LabVIEW SIM TCP/IP read improved and reconnect implemented Connection handling (alive checks) and SIM message 32-bit alignment just implemented (C# part only) MAPS user manual Work in progress

8. Work to be done MAPS test plan done, but needs a final touch work connection handling (alive checks) and SIM message 32-bit alignment to be implemented in LabView small amount of available effort (~days) still available  should be defined what to be done ASAP to avoid “last minute panic” acceptance of the remaining tickets foreseen for mid-July  no big effort foreseen for MA team here

9. iLLRF KVO Cosylab 2011 9

10. Cosylab 2007 Completed tasks Study LLRF requirements and architecture  Not very extensive Thomson LLRF documentation – hard to study and understand, lot of time spent  Considering RT LabView but dropped, luckily doesn’t change much regarding requirements and A&D Finalized Architecture & Design document  Race condition issue took some time, but solved LLRF trigger  PCB design for MRF universal IO adapter – signal convert only  5 adapters received from production, finalized  Pulse generation logic inside MTR’s FPGA  ITC – trigger FECOS component completed  ITC XML document prepared, reviewed by RMO

11. Cosylab 2007 Completed tasks – contd. ILC  Configuration of LLRF through TINE based on XML & PVSS  Error handling  ILC XML document is growing as part of ILC implementation  Received D-LLRF TINE simulator, installed and it starts up  At first no simulator was foreseen  Used in-house TINE simulator with single field to test connection  D-LLRF simulator came late but still on time  Valuable for development and initial testing TINE->LabView  TINE.dll implemented  Not working on RT LabView => decided to go with WinXP LabView  Simple tests carried out  No support for arrays – can be done in CWO-4  No support for asynchronous callbacks – investigation needed

12. Cosylab 2007 Yet to be done in CWO-3 ILC – should be completed on time (2011-07-22)  Verify that D-LLRF simulator is working as expected  Measurements  Maybe measurements not available with simulator  Custom commands  Finalize ILC XML Define test cases – should be completed on time (2011-07-22) Testing with D-LLRF simulator Around 5 people involved Spent ~60% of estimated effort On time with due dates PM…

13. NI performance tests LSE Cosylab 2011 13

14. Work to be done; measurement scenarios files (sequences)  1, 300 parallelism  concurrent, sequential from -> to variations / how  HDD -> PXI controller RAM  PXI controller RAM -> FlexRIO RAM  using DMA or not file sizes variations:  worst case (file size 1 MB kB)  typical case (file size 40kB / 100kB) controllers  PXI-8110, PXI-8102, PXI-8108 Cosylab 2011 14

15. Other presentations for CSL work… REDNET, PCC & FED, IS, Rok FECOS, Miha C#, Roland Cosylab 2011 15