1. 1 AFE IIt/VLSB Update Terry Hart, MICE Tracker Phone Conference September 5, 2007

2. 2 AFE IIt Firmware Latest versions of AFPGA and DFPGA firmware loaded and compiled on AFE IIt Using ChipScope signal analyzer to look at output signals –Signals not seen, but not so alarming at early stage –Kwame is following up on some leads. I will follow up on the current work as Bill will be taking new IIT position. Bill will set up IIT test stand and devote available time to AFPGA testing. Senerath has released two updated DFPGA firmware versions. Terry Hart, MICE Tracker Phone Conference, September 5, 2007

3. 3 VLSB Firmware Data format just about settled –Documented in MICE Note draft and to be included in updated AFE IIt MICE Note Modifications made and work in simulations –Block transfer of data –Memory bank address advance only when data –Fast clear of data after end of spill –Write start and end addresses of data into registers for DAQ. Firmware test with input data sent to board being set up at test stand. –ISE synthesis still being worked out –Once this is done, firmware to be uploaded onto VLSB FPGA for testing. Terry Hart, MICE Tracker Phone Conference, September 5, 2007

4. 4 VLSB Boards Parts are at FNAL. First few boards may be done in ~ 2 weeks. Quotes for outside vendors stuffing boards being checked in case FNAL labor not available. FNAL will test basic functionality of data registers. Terry Hart, MICE Tracker Phone Conference, September 5, 2007

5. 5 AFE IIt Boards 8 boards for 2 cryostats fully tested and characterized. 4 boards assigned to 3 rd cryostat, not yet tested and characterized 11 spare boards available, 4 of which will be assigned to 4 th cryostat. 2 more boards possibly available 23 (or 25) AFE IIt boards available for MICE Malcolm is preparing document with board testing/characterization procedures for Bill, Kwame, and me since Michael and Ben will be starting the new school year at IIT this week. Russ Rucinski indicated that cryostat to be ready in ~ 2 weeks. Terry Hart, MICE Tracker Phone Conference, September 5, 2007

6. 6 AFE IIt/VLSB Test Full integrated test planning has started. Likely to use cryostat/LED pulser/AFE IIt/VLSB test stand at D0 Assembly Building For scheduling estimate, need to find out –Estimated firmware completion times –Necessary hardware ISIS clock and trigger emulation Pulse generator Terry Hart, MICE Tracker Phone Conference, September 5, 2007

7. 7 Summary AFE IIt firmware now in testing stage on test board. VLSB firmware modifications tests being set up. VLSB board construction underway AFE IIt board testing/characterization ongoing Planning for full AFE IIt/VLSB integration tests underway AFE IIt and VLSB data format documentation being updated. Terry Hart, MICE Tracker Phone Conference, September 5, 2007