1. Fall 2002 1 CS-EE 480 University of Portland School of Engineering Project Meadowlark CMOS Programmable Digital Low-Pass Filter Jennifer Galaway Jennifer Williams

2. Spring 2003 2 CS-EE 481 University of Portland School of Engineering Overview Pictures of Chip Block Diagram and L-EDIT Layout Accomplishments Plans Issues/Alternatives

3. Spring 2003 3 CS-EE 481 University of Portland School of Engineering System Block Diagram

4. Spring 2003 4 CS-EE 481 University of Portland School of Engineering L-EDIT Layout

5. Spring 2003 5 CS-EE 481 University of Portland School of Engineering Milestones NumberDescriptionOriginal Date Previous Date Present Date 1Product Approval10/04/02 2Plan Approval10/25/02 3TPR File Completed11/27/02 4Design Release12/06/02 5TOP’s Approval02/14/03 6Receive MOSIS Chip03/17/03 7Prototype Release04/04/03 8Founder’s Day04/07/03 9Post Mortem04/22/03 10Final Report04/25/03

6. Spring 2003 6 CS-EE 481 University of Portland School of Engineering Accomplishments Design Review Complete TPR file Complete Began Ordering Parts Chip is in Fabrication Started working on Macro Model

7. Spring 2003 7 CS-EE 481 University of Portland School of Engineering Plans MACRO MODEL Theory of Operations Theory of Operations Approval Meetings More ordering of parts

8. Spring 2003 8 CS-EE 481 University of Portland School of Engineering Issues/Alternatives Programming the GAL’s Learning how to wire wrap TIME

9. Spring 2003 9 CS-EE 481 University of Portland School of Engineering Questions?