1. Microelectronic Circuit Design McGraw-Hill Chapter 4 Field-Effect Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock

2. Microelectronic Circuit Design McGraw-Hill Bias Analysis Approach Assume an operation region (generally the saturation region) Use circuit analysis to find V GS Use V GS to calculate I D, and I D to find V DS Check validity of operation region assumptions Change assumptions and analyze again if required. NOTE :An enhancement-mode device with V DS = V GS is always in saturation

3. Microelectronic Circuit Design McGraw-Hill Four-Resistor and Two-Resistor Biasing Provide excellent bias for transistors in discrete circuits. Stabilize bias point with respect to device parameter and temperature variations using negative feedback. Use single voltage source to supply both gate-bias voltage and drain current. Generally used to bias transistors in saturation region. Two-resistor biasing uses lesser components that four- resistor biasing and also isolates drain and gate terminals

4. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 1 (Constant Gate-Source Voltage Biasing) Problem: Find Q-pt (I D, V DS, V GS ) Approach: Assume operation region, find Q-point, check to see if result is consistent with operation region Assumption: Transistor is saturated, I G =I B =0 Analysis: Simplify circuit with Thevenin transformation to find V EQ and R EQ for gate-bias voltage. Find V GS and then use this to find I D. With I D, we can then calculate V DS.

5. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 1 (Constant Gate-Source Voltage Biasing)(contd.) Since I G =0, Check:V DS >V GS -V TN. Hence saturation region assumption is correct. Q-pt: (50.0  A, 5.00 V) with V GS = 3.00 V Discussion: The Q-point of this circuit is quite sensitive to changes in transistor characteristics, so it is not widely used.

6. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 2 (Load Line Analysis) Problem: Find Q-pt (I D, V DS, V GS ) Approach: Find an equation for the load line. Use this to find Q-pt at intersection of load line with device characteristic. Assumption: Transistor is saturated, I G =I B =0 Analysis: For circuit values above, load line becomes Use this to find two points on the load line.

7. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 2 (Load Line Analysis)(contd.) Check: The load line approach agrees with previous calculation. Q-pt: (50.0  A, 5.00 V) with V GS = 3.00 V Discussion: Q-pt is clearly in the saturation region. Graphical load line is good visual aid to see device operating region. @VDS=0, ID=100uA @ID=0, VDS=10V Plotting on device characteristic yields Q-pt at intersection with V GS = 3V device curve.

8. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 3 (Constant Gate-Source Voltage Biasing with Channel-Length Modulation) Problem: Find Q-pt (I D, V DS, V GS ) of previous example, given =0.02 V -1. Approach: Assume operation region, find Q-point, check to see if result is consistent with operation region Assumption: Transistor is saturated, I G =I B =0 Analysis: Simplify circuit with Thevenin transformation to find V EQ and R EQ for gate-bias voltage. Find V GS and then use this to find I D. With I D, we can then calculate V DS.

9. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 3 (Constant Gate-Source Voltage Biasing with Channel-Length Modulation) Check:V DS >V GS -V TN. Hence saturation region assumption is correct. Q-pt: (54.5  A, 4.55 V) with V GS = 3.00 V Discussion: The bias levels have changed by about 10%. Typically, component values will vary more than this, so there is little value in including effects in most circuits.

10. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 4 (Four-Resistor Biasing) Problem: Find Q-pt (I D, V DS ) Approach: Assume operation region, find Q-point, check to see if result is consistent with operation region Assumption: Transistor is saturated, I G =I B =0 Analysis: First, simplify circuit, split V DD into two equal-valued sources and apply Thevenin transformation to find V EQ and R EQ for gate-bias voltage

11. Microelectronic Circuit Design McGraw-Hill Bias Analysis: Example 4 (Four-Resistor Biasing) Since I G =0, Since V GS <V TN for V GS = -2.71 V and MOSFET will be cut-off, and I D = 34.4  A Also, V DS >V GS -V TN. Hence saturation region assumption is correct. Q-pt: (34.4  A, 6.08 V) with V GS = 2.66 V