2. ICC Module 3 Lesson 1 – Computer Architecture 1 / 12 © 2015 Ph. Janson Information, Computing & Communication Computer Architecture Clip 6 – Logic parallelism School of Computer Science & Communications P. Ienne (charts), Ph. Janson (commentary)

3. ICC Module 3 Lesson 1 – Computer Architecture 2 / 12 © 2015 Ph. Janson Outline ►Clip 0 – IntroductionClip 0 ►Clip 1 – Software technology – Assembler languageClip  Algorithms  Registers  Data instructions  Instruction numbering  Control instructions ►Clip 2 – Hardware architecture – Von Neumann’s stored program computer architectureClip  Data storage and processing  Control storage and processing ►Clip 3 – Hardware design – Instruction encodingClip ►Harware implementation – Transistor technology  Clip 4 – Computing circuits Clip  Clip 5 – Memory circuits Clip ►Hardware performance  Clip 6 – Logic parallelism Clip 6  Clip 7 – Architecture parallelism Clip 7 First clipPrevious clipNext clip

4. ICC Module 3 Lesson 1 – Computer Architecture 3 / 12 © 2015 Ph. Janson What about performance? Step 5 Source: Hennessy & Patterson, © MK 2011 Architecture! ~20% / year come from technology (= transistor speed) Processors performance increase: 52% / year

5. ICC Module 3 Lesson 1 – Computer Architecture 4 / 12 © 2015 Ph. Janson Two simple examples of performance increase: 1.At the circuit level Reducing the delay of an adder=> this clip 2.At the processor structure level Increasing the throughput of instructions How can one increase performance beyond transistor speed ? t = Reduce delay waiting to get a result = Increase throughput number of results per time unit t

6. ICC Module 3 Lesson 1 – Computer Architecture 5 / 12 © 2015 Ph. Janson Addition is easy 1 1 1 0 0 0 1 1 1 1 0 0 0 1 1 0 1 0 1 0 0 1 0 1 1 1 0 0 0 0 1 1 1 0 0 1 0 1 A 0 1 1 1 0 1 0 1 0 1 1 0 0 0 1 1 0 1 0 + B 1 0 1 1 1 0 0 0 1 0 1 1 1 0 0 1 0 1 1 = Bit additions 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 = 1  2 1 + 0  2 0 = 2 10 carry

7. ICC Module 3 Lesson 1 – Computer Architecture 6 / 12 © 2015 Ph. Janson Building an adder circuit is also (relatively) easy … 0 1 1 1 0 0 1 0 1 A … 1 0 0 0 1 1 0 1 0 + B … 1 1 1 0 0 1 0 1 1 = Bit addition 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 0 + 0 + 0 00 0 + 0 + 1 = 01 0 + 1 + 0 = 01 0 + 1 + 1 = 10 1 + 0 + 0 = 01 1 + 0 + 1 = 10 1 + 1 + 0 = 10 1 + 1 + 1 = 11 One needs to factor in the carry

8. ICC Module 3 Lesson 1 – Computer Architecture 7 / 12 © 2015 Ph. Janson ►Propagation of the carry is a fundamental aspect of additions ! But such an adder is slow ! … 0 1 1 1 0 0 1 0 1 A … 1 0 0 0 1 1 0 1 0 + B … 1 1 1 0 0 1 0 1 1 = ►The delay of an adder is thus proportionnel to the number of bits to be added

9. ICC Module 3 Lesson 1 – Computer Architecture 8 / 12 © 2015 Ph. Janson Can one do better ? 64-bit adder bits 0bits 63 T

10. ICC Module 3 Lesson 1 – Computer Architecture 9 / 12 © 2015 Ph. Janson Can one do better ? 32-bit adder bits 0 32-bit adder bits 63 Carry from bits 31

11. ICC Module 3 Lesson 1 – Computer Architecture 10 / 12 © 2015 Ph. Janson Can one do better ? 32-bit adder bits 0 32-bit adder bits 63 Carry from bits 31 T/2 One has gained nothing …

12. ICC Module 3 Lesson 1 – Computer Architecture 11 / 12 © 2015 Ph. Janson Can one do better ? 32-bit adder bits 0 bits 63 T/2 ‘1’ ‘0’ That only takes half the time ! 32-bit adder T/2

13. ICC Module 3 Lesson 1 – Computer Architecture 12 / 12 © 2015 Ph. Janson ►One can thus profoundly change the performance of a circuit without changing it functionality ►One can invest more transistors and energy to obtain faster circuits ►Or one can use slower circuits to spare energy Performance engineering (1) This is an example of logic synthesis which is one of the branches of Computer Engineering